Skip to content

V
V8
Commit 62d2b9d0 authored by Milad Farazmand's avatar Milad Farazmand Committed by Commit Bot
Browse files
Options

s390: [wasm-simd] Add to simd Decimal and FP operations 

Change-Id: Id5d6d1b2b6c06a2c4d1712bfa281bce18fb1320a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2090533Reviewed-by: 's avatarDeepti Gandluri <gdeepti@chromium.org>
Reviewed-by: 's avatarJunliang Yan <jyan@ca.ibm.com>
Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#66605}
parent 49c56af9
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 260 additions and 24 deletions
src/codegen/s390/constants-s390.h
View file @ 62d2b9d0
...@@ -613,7 +613,9 @@ using SixByteInstr = uint64_t; ...@@ -613,7 +613,9 @@ using SixByteInstr = uint64_t;
V(vperm, VPERM, 0xE78C) /* type = VRR_E VECTOR PERMUTE */ \ V(vperm, VPERM, 0xE78C) /* type = VRR_E VECTOR PERMUTE */ \
V(vsel, VSEL, 0xE78D) /* type = VRR_E VECTOR SELECT */ \ V(vsel, VSEL, 0xE78D) /* type = VRR_E VECTOR SELECT */ \
V(vfms, VFMS, 0xE78E) /* type = VRR_E VECTOR FP MULTIPLY AND SUBTRACT */ \ V(vfms, VFMS, 0xE78E) /* type = VRR_E VECTOR FP MULTIPLY AND SUBTRACT */ \
V(vfma, VFMA, 0xE78F) /* type = VRR_E VECTOR FP MULTIPLY AND ADD */ V(vfnms, VFNMS, \
0xE79E) /* type = VRR_E VECTOR FP NEGATIVE MULTIPLY AND SUBTRACT */ \
V(vfma, VFMA, 0xE78F) /* type = VRR_E VECTOR FP MULTIPLY AND ADD */
#define S390_VRI_C_OPCODE_LIST(V) \ #define S390_VRI_C_OPCODE_LIST(V) \
V(vrep, VREP, 0xE74D) /* type = VRI_C VECTOR REPLICATE */ V(vrep, VREP, 0xE74D) /* type = VRI_C VECTOR REPLICATE */
......
src/compiler/backend/instruction-selector.cc
View file @ 62d2b9d0
...@@ -2604,7 +2604,7 @@ void InstructionSelector::VisitI64x2ReplaceLaneI32Pair(Node* node) { ...@@ -2604,7 +2604,7 @@ void InstructionSelector::VisitI64x2ReplaceLaneI32Pair(Node* node) {
} }
#endif // !V8_TARGET_ARCH_IA32 #endif // !V8_TARGET_ARCH_IA32
#if !V8_TARGET_ARCH_X64 #if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_S390X
#if !V8_TARGET_ARCH_ARM64 #if !V8_TARGET_ARCH_ARM64
void InstructionSelector::VisitI64x2Splat(Node* node) { UNIMPLEMENTED(); } void InstructionSelector::VisitI64x2Splat(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitI64x2ExtractLane(Node* node) { UNIMPLEMENTED(); } void InstructionSelector::VisitI64x2ExtractLane(Node* node) { UNIMPLEMENTED(); }
...@@ -2626,7 +2626,7 @@ void InstructionSelector::VisitI64x2MinS(Node* node) { UNIMPLEMENTED(); } ...@@ -2626,7 +2626,7 @@ void InstructionSelector::VisitI64x2MinS(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitI64x2MaxS(Node* node) { UNIMPLEMENTED(); } void InstructionSelector::VisitI64x2MaxS(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitI64x2MinU(Node* node) { UNIMPLEMENTED(); } void InstructionSelector::VisitI64x2MinU(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitI64x2MaxU(Node* node) { UNIMPLEMENTED(); } void InstructionSelector::VisitI64x2MaxU(Node* node) { UNIMPLEMENTED(); }
#endif // !V8_TARGET_ARCH_X64 #endif // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_S390X
void InstructionSelector::VisitFinishRegion(Node* node) { EmitIdentity(node); } void InstructionSelector::VisitFinishRegion(Node* node) { EmitIdentity(node); }
......
src/compiler/backend/s390/instruction-codes-s390.h
View file @ 62d2b9d0
...@@ -213,6 +213,8 @@ namespace compiler { ...@@ -213,6 +213,8 @@ namespace compiler {
V(S390_F64x2Min) \ V(S390_F64x2Min) \
V(S390_F64x2Max) \ V(S390_F64x2Max) \
V(S390_F64x2ExtractLane) \ V(S390_F64x2ExtractLane) \
V(S390_F64x2Qfma) \
V(S390_F64x2Qfms) \
V(S390_F32x4Splat) \ V(S390_F32x4Splat) \
V(S390_F32x4ExtractLane) \ V(S390_F32x4ExtractLane) \
V(S390_F32x4ReplaceLane) \ V(S390_F32x4ReplaceLane) \
...@@ -234,6 +236,8 @@ namespace compiler { ...@@ -234,6 +236,8 @@ namespace compiler {
V(S390_F32x4Div) \ V(S390_F32x4Div) \
V(S390_F32x4Min) \ V(S390_F32x4Min) \
V(S390_F32x4Max) \ V(S390_F32x4Max) \
V(S390_F32x4Qfma) \
V(S390_F32x4Qfms) \
V(S390_I64x2Neg) \ V(S390_I64x2Neg) \
V(S390_I64x2Add) \ V(S390_I64x2Add) \
V(S390_I64x2Sub) \ V(S390_I64x2Sub) \
...@@ -241,6 +245,19 @@ namespace compiler { ...@@ -241,6 +245,19 @@ namespace compiler {
V(S390_I64x2ShrS) \ V(S390_I64x2ShrS) \
V(S390_I64x2ShrU) \ V(S390_I64x2ShrU) \
V(S390_I64x2Mul) \ V(S390_I64x2Mul) \
V(S390_I64x2Splat) \
V(S390_I64x2ReplaceLane) \
V(S390_I64x2ExtractLane) \
V(S390_I64x2Eq) \
V(S390_I64x2Ne) \
V(S390_I64x2GtS) \
V(S390_I64x2GeS) \
V(S390_I64x2GtU) \
V(S390_I64x2GeU) \
V(S390_I64x2MinS) \
V(S390_I64x2MinU) \
V(S390_I64x2MaxS) \
V(S390_I64x2MaxU) \
V(S390_I32x4Splat) \ V(S390_I32x4Splat) \
V(S390_I32x4ExtractLane) \ V(S390_I32x4ExtractLane) \
V(S390_I32x4ReplaceLane) \ V(S390_I32x4ReplaceLane) \
...@@ -268,6 +285,7 @@ namespace compiler { ...@@ -268,6 +285,7 @@ namespace compiler {
V(S390_I32x4SConvertI16x8High) \ V(S390_I32x4SConvertI16x8High) \
V(S390_I32x4UConvertI16x8Low) \ V(S390_I32x4UConvertI16x8Low) \
V(S390_I32x4UConvertI16x8High) \ V(S390_I32x4UConvertI16x8High) \
V(S390_I32x4Abs) \
V(S390_I16x8Splat) \ V(S390_I16x8Splat) \
V(S390_I16x8ExtractLaneU) \ V(S390_I16x8ExtractLaneU) \
V(S390_I16x8ExtractLaneS) \ V(S390_I16x8ExtractLaneS) \
...@@ -300,6 +318,8 @@ namespace compiler { ...@@ -300,6 +318,8 @@ namespace compiler {
V(S390_I16x8SubSaturateS) \ V(S390_I16x8SubSaturateS) \
V(S390_I16x8AddSaturateU) \ V(S390_I16x8AddSaturateU) \
V(S390_I16x8SubSaturateU) \ V(S390_I16x8SubSaturateU) \
V(S390_I16x8RoundingAverageU) \
V(S390_I16x8Abs) \
V(S390_I8x16Splat) \ V(S390_I8x16Splat) \
V(S390_I8x16ExtractLaneU) \ V(S390_I8x16ExtractLaneU) \
V(S390_I8x16ExtractLaneS) \ V(S390_I8x16ExtractLaneS) \
...@@ -327,11 +347,15 @@ namespace compiler { ...@@ -327,11 +347,15 @@ namespace compiler {
V(S390_I8x16SubSaturateS) \ V(S390_I8x16SubSaturateS) \
V(S390_I8x16AddSaturateU) \ V(S390_I8x16AddSaturateU) \
V(S390_I8x16SubSaturateU) \ V(S390_I8x16SubSaturateU) \
V(S390_I8x16RoundingAverageU) \
V(S390_I8x16Abs) \
V(S390_S8x16Shuffle) \ V(S390_S8x16Shuffle) \
V(S390_S8x16Swizzle) \ V(S390_S8x16Swizzle) \
V(S390_S1x2AnyTrue) \
V(S390_S1x4AnyTrue) \ V(S390_S1x4AnyTrue) \
V(S390_S1x8AnyTrue) \ V(S390_S1x8AnyTrue) \
V(S390_S1x16AnyTrue) \ V(S390_S1x16AnyTrue) \
V(S390_S1x2AllTrue) \
V(S390_S1x4AllTrue) \ V(S390_S1x4AllTrue) \
V(S390_S1x8AllTrue) \ V(S390_S1x8AllTrue) \
V(S390_S1x16AllTrue) \ V(S390_S1x16AllTrue) \
...@@ -341,6 +365,7 @@ namespace compiler { ...@@ -341,6 +365,7 @@ namespace compiler {
V(S390_S128Zero) \ V(S390_S128Zero) \
V(S390_S128Not) \ V(S390_S128Not) \
V(S390_S128Select) \ V(S390_S128Select) \
V(S390_S128AndNot) \
V(S390_StoreSimd128) \ V(S390_StoreSimd128) \
V(S390_LoadSimd128) V(S390_LoadSimd128)
......
src/compiler/backend/s390/instruction-scheduler-s390.cc
View file @ 62d2b9d0
...@@ -159,6 +159,8 @@ int InstructionScheduler::GetTargetInstructionFlags( ...@@ -159,6 +159,8 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_F64x2Min: case kS390_F64x2Min:
case kS390_F64x2Max: case kS390_F64x2Max:
case kS390_F64x2ExtractLane: case kS390_F64x2ExtractLane:
case kS390_F64x2Qfma:
case kS390_F64x2Qfms:
case kS390_F32x4Splat: case kS390_F32x4Splat:
case kS390_F32x4ExtractLane: case kS390_F32x4ExtractLane:
case kS390_F32x4ReplaceLane: case kS390_F32x4ReplaceLane:
...@@ -180,6 +182,8 @@ int InstructionScheduler::GetTargetInstructionFlags( ...@@ -180,6 +182,8 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_F32x4Div: case kS390_F32x4Div:
case kS390_F32x4Min: case kS390_F32x4Min:
case kS390_F32x4Max: case kS390_F32x4Max:
case kS390_F32x4Qfma:
case kS390_F32x4Qfms:
case kS390_I64x2Neg: case kS390_I64x2Neg:
case kS390_I64x2Add: case kS390_I64x2Add:
case kS390_I64x2Sub: case kS390_I64x2Sub:
...@@ -187,6 +191,19 @@ int InstructionScheduler::GetTargetInstructionFlags( ...@@ -187,6 +191,19 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_I64x2ShrS: case kS390_I64x2ShrS:
case kS390_I64x2ShrU: case kS390_I64x2ShrU:
case kS390_I64x2Mul: case kS390_I64x2Mul:
case kS390_I64x2Splat:
case kS390_I64x2ReplaceLane:
case kS390_I64x2ExtractLane:
case kS390_I64x2Eq:
case kS390_I64x2Ne:
case kS390_I64x2GtS:
case kS390_I64x2GeS:
case kS390_I64x2GtU:
case kS390_I64x2GeU:
case kS390_I64x2MinS:
case kS390_I64x2MinU:
case kS390_I64x2MaxS:
case kS390_I64x2MaxU:
case kS390_I32x4Splat: case kS390_I32x4Splat:
case kS390_I32x4ExtractLane: case kS390_I32x4ExtractLane:
case kS390_I32x4ReplaceLane: case kS390_I32x4ReplaceLane:
...@@ -214,6 +231,7 @@ int InstructionScheduler::GetTargetInstructionFlags( ...@@ -214,6 +231,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_I32x4SConvertI16x8High: case kS390_I32x4SConvertI16x8High:
case kS390_I32x4UConvertI16x8Low: case kS390_I32x4UConvertI16x8Low:
case kS390_I32x4UConvertI16x8High: case kS390_I32x4UConvertI16x8High:
case kS390_I32x4Abs:
case kS390_I16x8Splat: case kS390_I16x8Splat:
case kS390_I16x8ExtractLaneU: case kS390_I16x8ExtractLaneU:
case kS390_I16x8ExtractLaneS: case kS390_I16x8ExtractLaneS:
...@@ -246,6 +264,8 @@ int InstructionScheduler::GetTargetInstructionFlags( ...@@ -246,6 +264,8 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_I16x8SubSaturateS: case kS390_I16x8SubSaturateS:
case kS390_I16x8AddSaturateU: case kS390_I16x8AddSaturateU:
case kS390_I16x8SubSaturateU: case kS390_I16x8SubSaturateU:
case kS390_I16x8RoundingAverageU:
case kS390_I16x8Abs:
case kS390_I8x16Splat: case kS390_I8x16Splat:
case kS390_I8x16ExtractLaneU: case kS390_I8x16ExtractLaneU:
case kS390_I8x16ExtractLaneS: case kS390_I8x16ExtractLaneS:
...@@ -273,11 +293,15 @@ int InstructionScheduler::GetTargetInstructionFlags( ...@@ -273,11 +293,15 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_I8x16SubSaturateS: case kS390_I8x16SubSaturateS:
case kS390_I8x16AddSaturateU: case kS390_I8x16AddSaturateU:
case kS390_I8x16SubSaturateU: case kS390_I8x16SubSaturateU:
case kS390_I8x16RoundingAverageU:
case kS390_I8x16Abs:
case kS390_S8x16Shuffle: case kS390_S8x16Shuffle:
case kS390_S8x16Swizzle: case kS390_S8x16Swizzle:
case kS390_S1x2AnyTrue:
case kS390_S1x4AnyTrue: case kS390_S1x4AnyTrue:
case kS390_S1x8AnyTrue: case kS390_S1x8AnyTrue:
case kS390_S1x16AnyTrue: case kS390_S1x16AnyTrue:
case kS390_S1x2AllTrue:
case kS390_S1x4AllTrue: case kS390_S1x4AllTrue:
case kS390_S1x8AllTrue: case kS390_S1x8AllTrue:
case kS390_S1x16AllTrue: case kS390_S1x16AllTrue:
...@@ -287,6 +311,7 @@ int InstructionScheduler::GetTargetInstructionFlags( ...@@ -287,6 +311,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_S128Zero: case kS390_S128Zero:
case kS390_S128Not: case kS390_S128Not:
case kS390_S128Select: case kS390_S128Select:
case kS390_S128AndNot:
return kNoOpcodeFlags; return kNoOpcodeFlags;
case kS390_LoadWordS8: case kS390_LoadWordS8:
......
src/compiler/backend/s390/instruction-selector-s390.cc
View file @ 62d2b9d0
...@@ -2521,6 +2521,7 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) { ...@@ -2521,6 +2521,7 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) {
#define SIMD_TYPES(V) \ #define SIMD_TYPES(V) \
V(F64x2) \ V(F64x2) \
V(F32x4) \ V(F32x4) \
V(I64x2) \
V(I32x4) \ V(I32x4) \
V(I16x8) \ V(I16x8) \
V(I8x16) V(I8x16)
...@@ -2550,6 +2551,16 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) { ...@@ -2550,6 +2551,16 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) {
V(I64x2Add) \ V(I64x2Add) \
V(I64x2Sub) \ V(I64x2Sub) \
V(I64x2Mul) \ V(I64x2Mul) \
V(I64x2Eq) \
V(I64x2Ne) \
V(I64x2GtS) \
V(I64x2GeS) \
V(I64x2GtU) \
V(I64x2GeU) \
V(I64x2MinS) \
V(I64x2MinU) \
V(I64x2MaxS) \
V(I64x2MaxU) \
V(I32x4Add) \ V(I32x4Add) \
V(I32x4AddHoriz) \ V(I32x4AddHoriz) \
V(I32x4Sub) \ V(I32x4Sub) \
...@@ -2584,6 +2595,7 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) { ...@@ -2584,6 +2595,7 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) {
V(I16x8SubSaturateS) \ V(I16x8SubSaturateS) \
V(I16x8AddSaturateU) \ V(I16x8AddSaturateU) \
V(I16x8SubSaturateU) \ V(I16x8SubSaturateU) \
V(I16x8RoundingAverageU) \
V(I8x16Add) \ V(I8x16Add) \
V(I8x16Sub) \ V(I8x16Sub) \
V(I8x16Mul) \ V(I8x16Mul) \
...@@ -2603,9 +2615,11 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) { ...@@ -2603,9 +2615,11 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) {
V(I8x16SubSaturateS) \ V(I8x16SubSaturateS) \
V(I8x16AddSaturateU) \ V(I8x16AddSaturateU) \
V(I8x16SubSaturateU) \ V(I8x16SubSaturateU) \
V(I8x16RoundingAverageU) \
V(S128And) \ V(S128And) \
V(S128Or) \ V(S128Or) \
V(S128Xor) V(S128Xor) \
V(S128AndNot)
#define SIMD_UNOP_LIST(V) \ #define SIMD_UNOP_LIST(V) \
V(F64x2Abs) \ V(F64x2Abs) \
...@@ -2617,17 +2631,20 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) { ...@@ -2617,17 +2631,20 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) {
V(F32x4RecipSqrtApprox) \ V(F32x4RecipSqrtApprox) \
V(F32x4Sqrt) \ V(F32x4Sqrt) \
V(I64x2Neg) \ V(I64x2Neg) \
V(I16x8Abs) \
V(I32x4Neg) \ V(I32x4Neg) \
V(I32x4SConvertI16x8Low) \ V(I32x4SConvertI16x8Low) \
V(I32x4SConvertI16x8High) \ V(I32x4SConvertI16x8High) \
V(I32x4UConvertI16x8Low) \ V(I32x4UConvertI16x8Low) \
V(I32x4UConvertI16x8High) \ V(I32x4UConvertI16x8High) \
V(I32x4Abs) \
V(I16x8Neg) \ V(I16x8Neg) \
V(I16x8SConvertI8x16Low) \ V(I16x8SConvertI8x16Low) \
V(I16x8SConvertI8x16High) \ V(I16x8SConvertI8x16High) \
V(I16x8UConvertI8x16Low) \ V(I16x8UConvertI8x16Low) \
V(I16x8UConvertI8x16High) \ V(I16x8UConvertI8x16High) \
V(I8x16Neg) \ V(I8x16Neg) \
V(I8x16Abs) \
V(S128Not) V(S128Not)
#define SIMD_SHIFT_LIST(V) \ #define SIMD_SHIFT_LIST(V) \
...@@ -2645,9 +2662,11 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) { ...@@ -2645,9 +2662,11 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) {
V(I8x16ShrU) V(I8x16ShrU)
#define SIMD_BOOL_LIST(V) \ #define SIMD_BOOL_LIST(V) \
V(S1x2AnyTrue) \
V(S1x4AnyTrue) \ V(S1x4AnyTrue) \
V(S1x8AnyTrue) \ V(S1x8AnyTrue) \
V(S1x16AnyTrue) \ V(S1x16AnyTrue) \
V(S1x2AllTrue) \
V(S1x4AllTrue) \ V(S1x4AllTrue) \
V(S1x8AllTrue) \ V(S1x8AllTrue) \
V(S1x16AllTrue) V(S1x16AllTrue)
...@@ -2676,6 +2695,7 @@ SIMD_TYPES(SIMD_VISIT_SPLAT) ...@@ -2676,6 +2695,7 @@ SIMD_TYPES(SIMD_VISIT_SPLAT)
} }
SIMD_VISIT_EXTRACT_LANE(F64x2, ) SIMD_VISIT_EXTRACT_LANE(F64x2, )
SIMD_VISIT_EXTRACT_LANE(F32x4, ) SIMD_VISIT_EXTRACT_LANE(F32x4, )
SIMD_VISIT_EXTRACT_LANE(I64x2, )
SIMD_VISIT_EXTRACT_LANE(I32x4, ) SIMD_VISIT_EXTRACT_LANE(I32x4, )
SIMD_VISIT_EXTRACT_LANE(I16x8, U) SIMD_VISIT_EXTRACT_LANE(I16x8, U)
SIMD_VISIT_EXTRACT_LANE(I16x8, S) SIMD_VISIT_EXTRACT_LANE(I16x8, S)
...@@ -2749,6 +2769,20 @@ SIMD_BOOL_LIST(SIMD_VISIT_BOOL) ...@@ -2749,6 +2769,20 @@ SIMD_BOOL_LIST(SIMD_VISIT_BOOL)
SIMD_CONVERSION_LIST(SIMD_VISIT_CONVERSION) SIMD_CONVERSION_LIST(SIMD_VISIT_CONVERSION)
#undef SIMD_VISIT_CONVERSION #undef SIMD_VISIT_CONVERSION
#undef SIMD_CONVERSION_LIST #undef SIMD_CONVERSION_LIST
#define SIMD_VISIT_QFMOP(Opcode) \
void InstructionSelector::Visit##Opcode(Node* node) { \
S390OperandGenerator g(this); \
Emit(kS390_##Opcode, g.DefineSameAsFirst(node), \
g.UseUniqueRegister(node->InputAt(0)), \
g.UseUniqueRegister(node->InputAt(1)), \
g.UseRegister(node->InputAt(2))); \
}
SIMD_VISIT_QFMOP(F64x2Qfma)
SIMD_VISIT_QFMOP(F64x2Qfms)
SIMD_VISIT_QFMOP(F32x4Qfma)
SIMD_VISIT_QFMOP(F32x4Qfms)
#undef SIMD_VISIT_QFMOP
#undef SIMD_TYPES #undef SIMD_TYPES
void InstructionSelector::VisitS8x16Shuffle(Node* node) { void InstructionSelector::VisitS8x16Shuffle(Node* node) {
...@@ -2797,16 +2831,6 @@ void InstructionSelector::VisitS128Select(Node* node) { ...@@ -2797,16 +2831,6 @@ void InstructionSelector::VisitS128Select(Node* node) {
g.UseRegister(node->InputAt(2))); g.UseRegister(node->InputAt(2)));
} }
void InstructionSelector::VisitI16x8RoundingAverageU(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitI8x16RoundingAverageU(Node* node) {
UNIMPLEMENTED();
}
void InstructionSelector::VisitS128AndNot(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::EmitPrepareResults( void InstructionSelector::EmitPrepareResults(
ZoneVector<PushParameter>* results, const CallDescriptor* call_descriptor, ZoneVector<PushParameter>* results, const CallDescriptor* call_descriptor,
Node* node) { Node* node) {
...@@ -2830,13 +2854,10 @@ void InstructionSelector::EmitPrepareResults( ...@@ -2830,13 +2854,10 @@ void InstructionSelector::EmitPrepareResults(
} }
} }
void InstructionSelector::VisitLoadTransform(Node* node) { UNIMPLEMENTED(); } void InstructionSelector::VisitLoadTransform(Node* node) {
// We should never reach here, see http://crrev.com/c/2050811
void InstructionSelector::VisitI8x16Abs(Node* node) { UNIMPLEMENTED(); } UNREACHABLE();
}
void InstructionSelector::VisitI16x8Abs(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitI32x4Abs(Node* node) { UNIMPLEMENTED(); }
// static // static
MachineOperatorBuilder::Flags MachineOperatorBuilder::Flags
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment