Revert r23732 ("ARM64: Fix and improve --trace-sim register trace.") and...

Revert r23732 ("ARM64: Fix and improve --trace-sim register trace.") and r23733 ("ARM64: Fix build warning in r23732.)

They break the build when compiling with optimizations, e.g. optdebug:

../src/arm64/simulator-arm64.cc: In member function ‘void v8::internal::Simulator::PrintWriteFP(uintptr_t, size_t, unsigned int)’:
../src/arm64/simulator-arm64.cc:792:29: error: array subscript is above array bounds [-Werror=array-bounds]
../src/arm64/simulator-arm64.cc:799:29: error: array subscript is above array bounds [-Werror=array-bounds]

TBR=yangguo@chromium.org

Review URL: https://codereview.chromium.org/549083004

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@23765 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
parent 263a96b2
...@@ -1517,9 +1517,7 @@ int Disassembler::SubstituteLiteralField(Instruction* instr, ...@@ -1517,9 +1517,7 @@ int Disassembler::SubstituteLiteralField(Instruction* instr,
case LDR_w_lit: case LDR_w_lit:
case LDR_x_lit: case LDR_x_lit:
case LDR_s_lit: case LDR_s_lit:
case LDR_d_lit: case LDR_d_lit: AppendToOutput("(addr %p)", instr->LiteralAddress()); break;
AppendToOutput("(addr 0x%016" PRIxPTR ")", instr->LiteralAddress());
break;
default: UNREACHABLE(); default: UNREACHABLE();
} }
......
...@@ -352,9 +352,9 @@ class Instruction { ...@@ -352,9 +352,9 @@ class Instruction {
// Patch a literal load instruction to load from 'source'. // Patch a literal load instruction to load from 'source'.
void SetImmLLiteral(Instruction* source); void SetImmLLiteral(Instruction* source);
uintptr_t LiteralAddress() { uint8_t* LiteralAddress() {
int offset = ImmLLiteral() << kLoadLiteralScaleLog2; int offset = ImmLLiteral() << kLoadLiteralScaleLog2;
return reinterpret_cast<uintptr_t>(this) + offset; return reinterpret_cast<uint8_t*>(this) + offset;
} }
enum CheckAlignment { NO_CHECK, CHECK_ALIGNMENT }; enum CheckAlignment { NO_CHECK, CHECK_ALIGNMENT };
......
This diff is collapsed.
...@@ -312,6 +312,7 @@ class Simulator : public DecoderVisitor { ...@@ -312,6 +312,7 @@ class Simulator : public DecoderVisitor {
DCHECK(IsAligned(reinterpret_cast<uintptr_t>(pc_), kInstructionSize)); DCHECK(IsAligned(reinterpret_cast<uintptr_t>(pc_), kInstructionSize));
CheckBreakNext(); CheckBreakNext();
Decode(pc_); Decode(pc_);
LogProcessorState();
increment_pc(); increment_pc();
CheckBreakpoints(); CheckBreakpoints();
} }
...@@ -347,13 +348,16 @@ class Simulator : public DecoderVisitor { ...@@ -347,13 +348,16 @@ class Simulator : public DecoderVisitor {
return reg<int64_t>(code, r31mode); return reg<int64_t>(code, r31mode);
} }
// Write 'value' into an integer register. The value is zero-extended. This // Write 'size' bits of 'value' into an integer register. The value is
// behaviour matches AArch64 register writes. // zero-extended. This behaviour matches AArch64 register writes.
// Like set_reg(), but infer the access size from the template type.
template<typename T> template<typename T>
void set_reg(unsigned code, T value, void set_reg(unsigned code, T value,
Reg31Mode r31mode = Reg31IsZeroRegister) { Reg31Mode r31mode = Reg31IsZeroRegister) {
set_reg_no_log(code, value, r31mode); DCHECK(code < kNumberOfRegisters);
LogRegister(code, r31mode); if (!IsZeroRegister(code, r31mode))
registers_[code].Set(value);
} }
// Common specialized accessors for the set_reg() template. // Common specialized accessors for the set_reg() template.
...@@ -367,26 +371,6 @@ class Simulator : public DecoderVisitor { ...@@ -367,26 +371,6 @@ class Simulator : public DecoderVisitor {
set_reg(code, value, r31mode); set_reg(code, value, r31mode);
} }
// As above, but don't automatically log the register update.
template <typename T>
void set_reg_no_log(unsigned code, T value,
Reg31Mode r31mode = Reg31IsZeroRegister) {
DCHECK(code < kNumberOfRegisters);
if (!IsZeroRegister(code, r31mode)) {
registers_[code].Set(value);
}
}
void set_wreg_no_log(unsigned code, int32_t value,
Reg31Mode r31mode = Reg31IsZeroRegister) {
set_reg_no_log(code, value, r31mode);
}
void set_xreg_no_log(unsigned code, int64_t value,
Reg31Mode r31mode = Reg31IsZeroRegister) {
set_reg_no_log(code, value, r31mode);
}
// Commonly-used special cases. // Commonly-used special cases.
template<typename T> template<typename T>
void set_lr(T value) { void set_lr(T value) {
...@@ -446,13 +430,9 @@ class Simulator : public DecoderVisitor { ...@@ -446,13 +430,9 @@ class Simulator : public DecoderVisitor {
// This behaviour matches AArch64 register writes. // This behaviour matches AArch64 register writes.
template<typename T> template<typename T>
void set_fpreg(unsigned code, T value) { void set_fpreg(unsigned code, T value) {
set_fpreg_no_log(code, value); DCHECK((sizeof(value) == kDRegSize) || (sizeof(value) == kSRegSize));
DCHECK(code < kNumberOfFPRegisters);
if (sizeof(value) <= kSRegSize) { fpregisters_[code].Set(value);
LogFPRegister(code, kPrintSRegValue);
} else {
LogFPRegister(code, kPrintDRegValue);
}
} }
// Common specialized accessors for the set_fpreg() template. // Common specialized accessors for the set_fpreg() template.
...@@ -472,22 +452,6 @@ class Simulator : public DecoderVisitor { ...@@ -472,22 +452,6 @@ class Simulator : public DecoderVisitor {
set_fpreg(code, value); set_fpreg(code, value);
} }
// As above, but don't automatically log the register update.
template <typename T>
void set_fpreg_no_log(unsigned code, T value) {
DCHECK((sizeof(value) == kDRegSize) || (sizeof(value) == kSRegSize));
DCHECK(code < kNumberOfFPRegisters);
fpregisters_[code].Set(value);
}
void set_sreg_no_log(unsigned code, float value) {
set_fpreg_no_log(code, value);
}
void set_dreg_no_log(unsigned code, double value) {
set_fpreg_no_log(code, value);
}
SimSystemRegister& nzcv() { return nzcv_; } SimSystemRegister& nzcv() { return nzcv_; }
SimSystemRegister& fpcr() { return fpcr_; } SimSystemRegister& fpcr() { return fpcr_; }
...@@ -514,68 +478,33 @@ class Simulator : public DecoderVisitor { ...@@ -514,68 +478,33 @@ class Simulator : public DecoderVisitor {
// Disassemble instruction at the given address. // Disassemble instruction at the given address.
void PrintInstructionsAt(Instruction* pc, uint64_t count); void PrintInstructionsAt(Instruction* pc, uint64_t count);
// Print all registers of the specified types. void PrintSystemRegisters(bool print_all = false);
void PrintRegisters(); void PrintRegisters(bool print_all_regs = false);
void PrintFPRegisters(); void PrintFPRegisters(bool print_all_regs = false);
void PrintSystemRegisters(); void PrintProcessorState();
void PrintWrite(uintptr_t address, uint64_t value, unsigned num_bytes);
// Like Print* (above), but respect log_parameters().
void LogSystemRegisters() { void LogSystemRegisters() {
if (log_parameters() & LOG_SYS_REGS) PrintSystemRegisters(); if (log_parameters_ & LOG_SYS_REGS) PrintSystemRegisters();
} }
void LogRegisters() { void LogRegisters() {
if (log_parameters() & LOG_REGS) PrintRegisters(); if (log_parameters_ & LOG_REGS) PrintRegisters();
} }
void LogFPRegisters() { void LogFPRegisters() {
if (log_parameters() & LOG_FP_REGS) PrintFPRegisters(); if (log_parameters_ & LOG_FP_REGS) PrintFPRegisters();
}
// Specify relevant register sizes, for PrintFPRegister.
//
// These values are bit masks; they can be combined in case multiple views of
// a machine register are interesting.
enum PrintFPRegisterSizes {
kPrintDRegValue = 1 << kDRegSize,
kPrintSRegValue = 1 << kSRegSize,
kPrintAllFPRegValues = kPrintDRegValue | kPrintSRegValue
};
// Print individual register values (after update).
void PrintRegister(unsigned code, Reg31Mode r31mode = Reg31IsStackPointer);
void PrintFPRegister(unsigned code,
PrintFPRegisterSizes sizes = kPrintAllFPRegValues);
void PrintSystemRegister(SystemRegister id);
// Like Print* (above), but respect log_parameters().
void LogRegister(unsigned code, Reg31Mode r31mode = Reg31IsStackPointer) {
if (log_parameters() & LOG_REGS) PrintRegister(code, r31mode);
} }
void LogFPRegister(unsigned code, void LogProcessorState() {
PrintFPRegisterSizes sizes = kPrintAllFPRegValues) { LogSystemRegisters();
if (log_parameters() & LOG_FP_REGS) PrintFPRegister(code, sizes); LogRegisters();
LogFPRegisters();
} }
void LogSystemRegister(SystemRegister id) { template <typename T>
if (log_parameters() & LOG_SYS_REGS) PrintSystemRegister(id); void LogWrite(uintptr_t address, T value) {
} uint64_t raw_value = 0;
DCHECK(sizeof(value) <= sizeof(raw_value));
// Print memory accesses. if (log_parameters_ & LOG_WRITE) {
void PrintRead(uintptr_t address, size_t size, unsigned reg_code); memcpy(&raw_value, &value, sizeof(value));
void PrintReadFP(uintptr_t address, size_t size, unsigned reg_code); PrintWrite(address, raw_value, sizeof(value));
void PrintWrite(uintptr_t address, size_t size, unsigned reg_code); }
void PrintWriteFP(uintptr_t address, size_t size, unsigned reg_code);
// Like Print* (above), but respect log_parameters().
void LogRead(uintptr_t address, size_t size, unsigned reg_code) {
if (log_parameters() & LOG_REGS) PrintRead(address, size, reg_code);
}
void LogReadFP(uintptr_t address, size_t size, unsigned reg_code) {
if (log_parameters() & LOG_FP_REGS) PrintReadFP(address, size, reg_code);
}
void LogWrite(uintptr_t address, size_t size, unsigned reg_code) {
if (log_parameters() & LOG_WRITE) PrintWrite(address, size, reg_code);
}
void LogWriteFP(uintptr_t address, size_t size, unsigned reg_code) {
if (log_parameters() & LOG_WRITE) PrintWriteFP(address, size, reg_code);
} }
int log_parameters() { return log_parameters_; } int log_parameters() { return log_parameters_; }
...@@ -666,14 +595,14 @@ class Simulator : public DecoderVisitor { ...@@ -666,14 +595,14 @@ class Simulator : public DecoderVisitor {
int64_t offset, int64_t offset,
AddrMode addrmode); AddrMode addrmode);
void LoadStorePairHelper(Instruction* instr, AddrMode addrmode); void LoadStorePairHelper(Instruction* instr, AddrMode addrmode);
uintptr_t LoadStoreAddress(unsigned addr_reg, int64_t offset, uint8_t* LoadStoreAddress(unsigned addr_reg,
AddrMode addrmode); int64_t offset,
AddrMode addrmode);
void LoadStoreWriteBack(unsigned addr_reg, void LoadStoreWriteBack(unsigned addr_reg,
int64_t offset, int64_t offset,
AddrMode addrmode); AddrMode addrmode);
void CheckMemoryAccess(uintptr_t address, uintptr_t stack); void CheckMemoryAccess(uint8_t* address, uint8_t* stack);
// Memory read helpers.
template <typename T, typename A> template <typename T, typename A>
T MemoryRead(A address) { T MemoryRead(A address) {
T value; T value;
...@@ -683,11 +612,11 @@ class Simulator : public DecoderVisitor { ...@@ -683,11 +612,11 @@ class Simulator : public DecoderVisitor {
return value; return value;
} }
// Memory write helpers.
template <typename T, typename A> template <typename T, typename A>
void MemoryWrite(A address, T value) { void MemoryWrite(A address, T value) {
STATIC_ASSERT((sizeof(value) == 1) || (sizeof(value) == 2) || STATIC_ASSERT((sizeof(value) == 1) || (sizeof(value) == 2) ||
(sizeof(value) == 4) || (sizeof(value) == 8)); (sizeof(value) == 4) || (sizeof(value) == 8));
LogWrite(reinterpret_cast<uintptr_t>(address), value);
memcpy(reinterpret_cast<void*>(address), &value, sizeof(value)); memcpy(reinterpret_cast<void*>(address), &value, sizeof(value));
} }
...@@ -842,10 +771,10 @@ class Simulator : public DecoderVisitor { ...@@ -842,10 +771,10 @@ class Simulator : public DecoderVisitor {
static const uint32_t kConditionFlagsMask = 0xf0000000; static const uint32_t kConditionFlagsMask = 0xf0000000;
// Stack // Stack
uintptr_t stack_; byte* stack_;
static const size_t stack_protection_size_ = KB; static const intptr_t stack_protection_size_ = KB;
size_t stack_size_; intptr_t stack_size_;
uintptr_t stack_limit_; byte* stack_limit_;
Decoder<DispatchingDecoderVisitor>* decoder_; Decoder<DispatchingDecoderVisitor>* decoder_;
Decoder<DispatchingDecoderVisitor>* disassembler_decoder_; Decoder<DispatchingDecoderVisitor>* disassembler_decoder_;
......
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