S390: Fix SQEBR sim to treat operands as float32

Fix bug in simulator which incorrectly interpreted the operands
for SQEBR (Float32 sqrt) as 64-bit doubles.  Add missing
disassembler case for SQEBR as well.

R=jyan@ca.ibm.com,michael_dawson@ca.ibm.com,mbrandy@us.ibm.com
BUG=

Review URL: https://codereview.chromium.org/1837263003

Cr-Commit-Position: refs/heads/master@{#35119}

src/s390/disasm-s390.cc

@@ -967,6 +967,9 @@ bool Decoder::DecodeFourByte(Instruction* instr) {
     case SQDBR:
       Format(instr, "sqdbr\t'f5,'f6");
       break;
+    case SQEBR:
+      Format(instr, "sqebr\t'f5,'f6");
+      break;
     case LCDBR:
       Format(instr, "lcdbr\t'f5,'f6");
       break;

src/s390/simulator-s390.cc

@@ -3437,8 +3437,8 @@ bool Simulator::DecodeFourByteFloatingPoint(Instruction* instr) {
         r1_val = std::sqrt(r2_val);
         set_d_register_from_double(r1, r1_val);
       } else if (op == SQEBR) {
-        r1_val = std::sqrt(r2_val);
-        set_d_register_from_float32(r1, r1_val);
+        fr1_val = std::sqrt(fr2_val);
+        set_d_register_from_float32(r1, fr1_val);
       } else if (op == CFEBR) {
         DecodeFourByteFloatingPointRound(instr);
       } else if (op == LCDBR) {