PPC: replace LoadPX with LoadU64

Change-Id: I24081a3fe941d083cefa782d4ba712acf7776980
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2905766
Commit-Queue: Junliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Auto-Submit: Junliang Yan <junyan@redhat.com>
Reviewed-by: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#74685}

src/builtins/ppc/builtins-ppc.cc

@@ -1192,8 +1192,8 @@ void Builtins::Generate_InterpreterEntryTrampoline(MacroAssembler* masm) {
   __ lbzx(r6, MemOperand(kInterpreterBytecodeArrayRegister,
                          kInterpreterBytecodeOffsetRegister));
   __ ShiftLeftImm(r6, r6, Operand(kSystemPointerSizeLog2));
-  __ LoadPX(kJavaScriptCallCodeStartRegister,
-            MemOperand(kInterpreterDispatchTableRegister, r6));
+  __ LoadU64(kJavaScriptCallCodeStartRegister,
+             MemOperand(kInterpreterDispatchTableRegister, r6));
   __ Call(kJavaScriptCallCodeStartRegister);
 
   masm->isolate()->heap()->SetInterpreterEntryReturnPCOffset(masm->pc_offset());
@@ -1470,8 +1470,8 @@ static void Generate_InterpreterEnterBytecode(MacroAssembler* masm) {
   __ lbzx(ip, MemOperand(kInterpreterBytecodeArrayRegister,
                          kInterpreterBytecodeOffsetRegister));
   __ ShiftLeftImm(scratch, scratch, Operand(kSystemPointerSizeLog2));
-  __ LoadPX(kJavaScriptCallCodeStartRegister,
-            MemOperand(kInterpreterDispatchTableRegister, scratch));
+  __ LoadU64(kJavaScriptCallCodeStartRegister,
+             MemOperand(kInterpreterDispatchTableRegister, scratch));
   __ Jump(kJavaScriptCallCodeStartRegister);
 }
 
@@ -2014,7 +2014,7 @@ void Builtins::Generate_CallOrConstructForwardVarargs(MacroAssembler* masm,
       {
         __ subi(r8, r8, Operand(1));
         __ ShiftLeftImm(scratch, r8, Operand(kSystemPointerSizeLog2));
-        __ LoadPX(r0, MemOperand(r7, scratch));
+        __ LoadU64(r0, MemOperand(r7, scratch));
         __ StorePX(r0, MemOperand(r5, scratch));
         __ cmpi(r8, Operand::Zero());
         __ bne(&loop);

src/codegen/ppc/macro-assembler-ppc.cc

@@ -2673,25 +2673,40 @@ void MacroAssembler::AndSmiLiteral(Register dst, Register src, Smi smi,
 // Load a "pointer" sized value from the memory location
 void TurboAssembler::LoadU64(Register dst, const MemOperand& mem,
                              Register scratch) {
-  DCHECK_EQ(mem.rb(), no_reg);
   int offset = mem.offset();
-  int misaligned = (offset & 3);
-  int adj = (offset & 3) - 4;
-  int alignedOffset = (offset & ~3) + 4;
-
-  if (!is_int16(offset) || (misaligned && !is_int16(alignedOffset))) {
-    /* cannot use d-form */
-    mov(scratch, Operand(offset));
-    LoadPX(dst, MemOperand(mem.ra(), scratch));
+  if (mem.rb() == no_reg) {
+    int misaligned = (offset & 3);
+    int adj = (offset & 3) - 4;
+    int alignedOffset = (offset & ~3) + 4;
+
+    if (!is_int16(offset) || (misaligned && !is_int16(alignedOffset))) {
+      /* cannot use d-form */
+      CHECK_NE(scratch, no_reg);
+      mov(scratch, Operand(offset));
+      ldx(dst, MemOperand(mem.ra(), scratch));
+    } else {
+      if (misaligned) {
+        // adjust base to conform to offset alignment requirements
+        // Todo: enhance to use scratch if dst is unsuitable
+        DCHECK_NE(dst, r0);
+        addi(dst, mem.ra(), Operand(adj));
+        ld(dst, MemOperand(dst, alignedOffset));
+      } else {
+        ld(dst, mem);
+      }
+    }
   } else {
-    if (misaligned) {
-      // adjust base to conform to offset alignment requirements
-      // Todo: enhance to use scratch if dst is unsuitable
-      DCHECK_NE(dst, r0);
-      addi(dst, mem.ra(), Operand(adj));
-      ld(dst, MemOperand(dst, alignedOffset));
+    if (offset == 0) {
+      ldx(dst, mem);
+    } else if (is_int16(offset)) {
+      CHECK_NE(scratch, no_reg);
+      addi(scratch, mem.rb(), Operand(offset));
+      ldx(dst, mem);
     } else {
-      ld(dst, mem);
+      CHECK_NE(scratch, no_reg);
+      mov(scratch, Operand(offset));
+      add(scratch, scratch, mem.rb());
+      ldx(dst, MemOperand(mem.ra(), scratch));
     }
   }
 }
@@ -3221,7 +3236,7 @@ void TurboAssembler::LoadEntryFromBuiltinIndex(Register builtin_index) {
   }
   addi(builtin_index, builtin_index,
        Operand(IsolateData::builtin_entry_table_offset()));
-  LoadPX(builtin_index, MemOperand(kRootRegister, builtin_index));
+  LoadU64(builtin_index, MemOperand(kRootRegister, builtin_index));
 }
 
 void TurboAssembler::CallBuiltinByIndex(Register builtin_index) {

src/codegen/ppc/macro-assembler-ppc.h

@@ -38,7 +38,6 @@ Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2 = no_reg,
 
 // These exist to provide portability between 32 and 64bit
 #if V8_TARGET_ARCH_PPC64
-#define LoadPX ldx
 #define LoadPUX ldux
 #define StorePX stdx
 #define StorePUX stdux
@@ -51,7 +50,6 @@ Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2 = no_reg,
 #define ShiftRight_ srd
 #define ShiftRightArith srad
 #else
-#define LoadPX lwzx
 #define LoadPUX lwzux
 #define StorePX stwx
 #define StorePUX stwux

src/compiler/backend/ppc/code-generator-ppc.cc

@@ -4000,7 +4000,7 @@ void CodeGenerator::AssembleArchTableSwitch(Instruction* instr) {
   __ bge(GetLabel(i.InputRpo(1)));
   __ mov_label_addr(kScratchReg, table);
   __ ShiftLeftImm(r0, input, Operand(kSystemPointerSizeLog2));
-  __ LoadPX(kScratchReg, MemOperand(kScratchReg, r0));
+  __ LoadU64(kScratchReg, MemOperand(kScratchReg, r0));
   __ Jump(kScratchReg);
 }