[wasm][memory64] Test traps

... and fix an issue in TurboFan and issues in Liftoff.

R=manoskouk@chromium.org

Bug: v8:10949
Change-Id: I3493205ab56a4ded550af6fcd75c465f7d8894ca
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2618246
Commit-Queue: Clemens Backes <clemensb@chromium.org>
Reviewed-by: Manos Koukoutos <manoskouk@chromium.org>
Cr-Commit-Position: refs/heads/master@{#72035}

src/compiler/wasm-compiler.cc

@@ -3793,7 +3793,7 @@ Node* WasmGraphBuilder::BoundsCheckMem(uint8_t access_size, Node* index,
                                        wasm::WasmCodePosition position,
                                        EnforceBoundsCheck enforce_check) {
   DCHECK_LE(1, access_size);
-  index = Uint32ToUintptr(index);
+  if (!env_->module->is_memory64) index = Uint32ToUintptr(index);
   if (!FLAG_wasm_bounds_checks) return index;
 
   if (use_trap_handler() && enforce_check == kCanOmitBoundsCheck) {

src/wasm/baseline/x64/liftoff-assembler-x64.h

@@ -353,9 +353,6 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
                             Register offset_reg, uintptr_t offset_imm,
                             LoadType type, LiftoffRegList pinned,
                             uint32_t* protected_load_pc, bool is_load_mem) {
-  if (emit_debug_code() && offset_reg != no_reg) {
-    AssertZeroExtended(offset_reg);
-  }
   Operand src_op = liftoff::GetMemOp(this, src_addr, offset_reg, offset_imm);
   if (protected_load_pc) *protected_load_pc = pc_offset();
   switch (type.value()) {
@@ -405,9 +402,6 @@ void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
                              uintptr_t offset_imm, LiftoffRegister src,
                              StoreType type, LiftoffRegList /* pinned */,
                              uint32_t* protected_store_pc, bool is_store_mem) {
-  if (emit_debug_code() && offset_reg != no_reg) {
-    AssertZeroExtended(offset_reg);
-  }
   Operand dst_op = liftoff::GetMemOp(this, dst_addr, offset_reg, offset_imm);
   if (protected_store_pc) *protected_store_pc = pc_offset();
   switch (type.value()) {
@@ -441,9 +435,6 @@ void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
 void LiftoffAssembler::AtomicStore(Register dst_addr, Register offset_reg,
                                    uintptr_t offset_imm, LiftoffRegister src,
                                    StoreType type, LiftoffRegList pinned) {
-  if (emit_debug_code() && offset_reg != no_reg) {
-    AssertZeroExtended(offset_reg);
-  }
   Operand dst_op = liftoff::GetMemOp(this, dst_addr, offset_reg, offset_imm);
   Register src_reg = src.gp();
   if (cache_state()->is_used(src)) {
@@ -482,9 +473,6 @@ void LiftoffAssembler::AtomicAdd(Register dst_addr, Register offset_reg,
     movq(result.gp(), value.gp());
     value = result;
   }
-  if (emit_debug_code() && offset_reg != no_reg) {
-    AssertZeroExtended(offset_reg);
-  }
   Operand dst_op = liftoff::GetMemOp(this, dst_addr, offset_reg, offset_imm);
   lock();
   switch (type.value()) {
@@ -527,9 +515,6 @@ void LiftoffAssembler::AtomicSub(Register dst_addr, Register offset_reg,
     movq(result.gp(), value.gp());
     value = result;
   }
-  if (emit_debug_code() && offset_reg != no_reg) {
-    AssertZeroExtended(offset_reg);
-  }
   Operand dst_op = liftoff::GetMemOp(this, dst_addr, offset_reg, offset_imm);
   switch (type.value()) {
     case StoreType::kI32Store8:
@@ -585,9 +570,6 @@ inline void AtomicBinop(LiftoffAssembler* lasm,
   LiftoffRegList pinned =
       LiftoffRegList::ForRegs(dst_addr, offset_reg, value_reg);
   __ ClearRegister(rax, {&dst_addr, &offset_reg, &value_reg}, pinned);
-  if (__ emit_debug_code() && offset_reg != no_reg) {
-    __ AssertZeroExtended(offset_reg);
-  }
   Operand dst_op = liftoff::GetMemOp(lasm, dst_addr, offset_reg, offset_imm);
 
   switch (type.value()) {
@@ -684,9 +666,6 @@ void LiftoffAssembler::AtomicExchange(Register dst_addr, Register offset_reg,
     movq(result.gp(), value.gp());
     value = result;
   }
-  if (emit_debug_code() && offset_reg != no_reg) {
-    AssertZeroExtended(offset_reg);
-  }
   Operand dst_op = liftoff::GetMemOp(this, dst_addr, offset_reg, offset_imm);
   switch (type.value()) {
     case StoreType::kI32Store8:
@@ -732,9 +711,6 @@ void LiftoffAssembler::AtomicCompareExchange(
     movq(rax, expected.gp());
   }
 
-  if (emit_debug_code() && offset_reg != no_reg) {
-    AssertZeroExtended(offset_reg);
-  }
   Operand dst_op = liftoff::GetMemOp(this, dst_addr, offset_reg, offset_imm);
 
   lock();
@@ -2351,9 +2327,6 @@ void LiftoffAssembler::LoadTransform(LiftoffRegister dst, Register src_addr,
                                      LoadType type,
                                      LoadTransformationKind transform,
                                      uint32_t* protected_load_pc) {
-  if (emit_debug_code() && offset_reg != no_reg) {
-    AssertZeroExtended(offset_reg);
-  }
   Operand src_op = liftoff::GetMemOp(this, src_addr, offset_reg, offset_imm);
   *protected_load_pc = pc_offset();
   MachineType memtype = type.mem_type();
@@ -2406,9 +2379,6 @@ void LiftoffAssembler::LoadLane(LiftoffRegister dst, LiftoffRegister src,
                                 Register addr, Register offset_reg,
                                 uintptr_t offset_imm, LoadType type,
                                 uint8_t laneidx, uint32_t* protected_load_pc) {
-  if (emit_debug_code() && offset_reg != no_reg) {
-    AssertZeroExtended(offset_reg);
-  }
   Operand src_op = liftoff::GetMemOp(this, addr, offset_reg, offset_imm);
   *protected_load_pc = pc_offset();
 

test/cctest/wasm/test-run-wasm-memory64.cc

@@ -41,7 +41,11 @@ WASM_EXEC_TEST(Load) {
   CHECK_EQ(0x12, r.Call(3));
   CHECK_EQ(0x0, r.Call(4));
 
-  // TODO(clemensb): Check traps.
+  CHECK_TRAP(r.Call(-1));
+  CHECK_TRAP(r.Call(kWasmPageSize));
+  CHECK_TRAP(r.Call(kWasmPageSize - 3));
+  CHECK_EQ(0x0, r.Call(kWasmPageSize - 4));
+  CHECK_TRAP(r.Call(uint64_t{1} << 32));
 }
 
 // TODO(clemensb): Test atomic instructions.