[wasm] Align OpcodeName() with spec for Atomics opcodes

The names we returned in WasmOpcodes::OpcodeName(...) for Atomics opcodes
did not match the spec. This patch fixes that.
This matters in particular when we want to provide disassembly of
modules.

Bug: v8:6532
Change-Id: Ia8791feee617b75d598ad373bafba7da5687f523
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3704496
Auto-Submit: Jakob Kummerow <jkummerow@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Andreas Haas <ahaas@chromium.org>
Cr-Commit-Position: refs/heads/main@{#81142}

src/wasm/wasm-opcodes-inl.h

@@ -73,16 +73,21 @@ namespace wasm {
   CASE_SIGN_OP(I32, name##8, str "8")   \
   CASE_SIGN_OP(I32, name##16, str "16") \
   CASE_I32_OP(name, str "32")
-#define CASE_U32_OP(name, str)            \
-  CASE_I32_OP(name, str "32")             \
-  CASE_UNSIGNED_OP(I32, name##8, str "8") \
-  CASE_UNSIGNED_OP(I32, name##16, str "16")
-#define CASE_UNSIGNED_ALL_OP(name, str)     \
-  CASE_U32_OP(name, str)                    \
-  CASE_I64_OP(name, str "64")               \
-  CASE_UNSIGNED_OP(I64, name##8, str "8")   \
-  CASE_UNSIGNED_OP(I64, name##16, str "16") \
-  CASE_UNSIGNED_OP(I64, name##32, str "32")
+#define CASE_ATOMIC_LOAD(name, str)  \
+  CASE_INT_OP(name, str)             \
+  CASE_INT_OP(name##8U, str "8_u")   \
+  CASE_INT_OP(name##16U, str "16_u") \
+  CASE_I64_OP(name##32U, str "32_u")
+#define CASE_ATOMIC_STORE(name, str) \
+  CASE_INT_OP(name, str)             \
+  CASE_INT_OP(name##8U, str "8")     \
+  CASE_INT_OP(name##16U, str "16")   \
+  CASE_I64_OP(name##32U, str "32")
+#define CASE_ATOMIC_RMW(Name, str)                 \
+  CASE_INT_OP(Name, "atomic.rmw." str)             \
+  CASE_INT_OP(Name##8U, "atomic.rmw8." str "_u")   \
+  CASE_INT_OP(Name##16U, "atomic.rmw16." str "_u") \
+  CASE_I64_OP(Name##32U, "atomic.rmw32." str "_u")
 
 // static
 constexpr const char* WasmOpcodes::OpcodeName(WasmOpcode opcode) {
@@ -381,18 +386,19 @@ constexpr const char* WasmOpcodes::OpcodeName(WasmOpcode opcode) {
     CASE_I32x4_OP(DotI8x16I7x16AddS, "dot_i8x16_i7x16_add_s")
 
     // Atomic operations.
-    CASE_OP(AtomicNotify, "atomic.notify")
-    CASE_INT_OP(AtomicWait, "atomic.wait")
+    CASE_OP(AtomicNotify, "memory.atomic.notify")
+    CASE_OP(I32AtomicWait, "memory.atomic.wait32")
+    CASE_OP(I64AtomicWait, "memory.atomic.wait64")
     CASE_OP(AtomicFence, "atomic.fence")
-    CASE_UNSIGNED_ALL_OP(AtomicLoad, "atomic.load")
-    CASE_UNSIGNED_ALL_OP(AtomicStore, "atomic.store")
-    CASE_UNSIGNED_ALL_OP(AtomicAdd, "atomic.add")
-    CASE_UNSIGNED_ALL_OP(AtomicSub, "atomic.sub")
-    CASE_UNSIGNED_ALL_OP(AtomicAnd, "atomic.and")
-    CASE_UNSIGNED_ALL_OP(AtomicOr, "atomic.or")
-    CASE_UNSIGNED_ALL_OP(AtomicXor, "atomic.xor")
-    CASE_UNSIGNED_ALL_OP(AtomicExchange, "atomic.xchng")
-    CASE_UNSIGNED_ALL_OP(AtomicCompareExchange, "atomic.cmpxchng")
+    CASE_ATOMIC_LOAD(AtomicLoad, "atomic.load")
+    CASE_ATOMIC_STORE(AtomicStore, "atomic.store")
+    CASE_ATOMIC_RMW(AtomicAdd, "add")
+    CASE_ATOMIC_RMW(AtomicSub, "sub")
+    CASE_ATOMIC_RMW(AtomicAnd, "and")
+    CASE_ATOMIC_RMW(AtomicOr, "or")
+    CASE_ATOMIC_RMW(AtomicXor, "xor")
+    CASE_ATOMIC_RMW(AtomicExchange, "xchg")
+    CASE_ATOMIC_RMW(AtomicCompareExchange, "cmpxchg")
 
     // GC operations.
     CASE_OP(StructNewWithRtt, "struct.new_with_rtt")
@@ -510,12 +516,13 @@ constexpr const char* WasmOpcodes::OpcodeName(WasmOpcode opcode) {
 #undef CASE_SIMDI_NO64X2_OP
 #undef CASE_SIGN_OP
 #undef CASE_UNSIGNED_OP
-#undef CASE_UNSIGNED_ALL_OP
 #undef CASE_ALL_SIGN_OP
 #undef CASE_CONVERT_OP
 #undef CASE_CONVERT_SAT_OP
 #undef CASE_L32_OP
-#undef CASE_U32_OP
+#undef CASE_ATOMIC_LOAD
+#undef CASE_ATOMIC_STORE
+#undef CASE_ATOMIC_RMW
 
 // static
 constexpr bool WasmOpcodes::IsPrefixOpcode(WasmOpcode opcode) {

test/unittests/BUILD.gn

@@ -505,6 +505,7 @@ v8_source_set("unittests_sources") {
       "wasm/wasm-macro-gen-unittest.cc",
       "wasm/wasm-module-builder-unittest.cc",
       "wasm/wasm-module-sourcemap-unittest.cc",
+      "wasm/wasm-opcodes-unittest.cc",
     ]
   }
 

test/unittests/wasm/wasm-opcodes-unittest.cc

+// Copyright 2022 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/wasm/wasm-opcodes-inl.h"
+#include "test/unittests/test-utils.h"
+
+namespace v8 {
+namespace internal {
+namespace wasm {
+
+class WasmOpcodeTest : public TestWithZone {
+ public:
+  void CheckName(WasmOpcode opcode, const char* expected) {
+    EXPECT_STREQ(expected, WasmOpcodes::OpcodeName(opcode));
+  }
+};
+
+TEST_F(WasmOpcodeTest, AtomicNames) {
+  // Reference:
+  // https://webassembly.github.io/threads/core/text/instructions.html#atomic-memory-instructions
+  CheckName(kExprAtomicNotify, "memory.atomic.notify");
+  CheckName(kExprI32AtomicWait, "memory.atomic.wait32");
+  CheckName(kExprI64AtomicWait, "memory.atomic.wait64");
+  CheckName(kExprI32AtomicLoad, "i32.atomic.load");
+  CheckName(kExprI64AtomicLoad, "i64.atomic.load");
+  CheckName(kExprI32AtomicLoad8U, "i32.atomic.load8_u");
+  CheckName(kExprI32AtomicLoad16U, "i32.atomic.load16_u");
+  CheckName(kExprI64AtomicLoad8U, "i64.atomic.load8_u");
+  CheckName(kExprI64AtomicLoad16U, "i64.atomic.load16_u");
+  CheckName(kExprI64AtomicLoad32U, "i64.atomic.load32_u");
+  CheckName(kExprI32AtomicStore, "i32.atomic.store");
+  CheckName(kExprI64AtomicStore, "i64.atomic.store");
+  CheckName(kExprI32AtomicStore8U, "i32.atomic.store8");
+  CheckName(kExprI32AtomicStore16U, "i32.atomic.store16");
+  CheckName(kExprI64AtomicStore8U, "i64.atomic.store8");
+  CheckName(kExprI64AtomicStore16U, "i64.atomic.store16");
+  CheckName(kExprI64AtomicStore32U, "i64.atomic.store32");
+  CheckName(kExprI32AtomicAdd, "i32.atomic.rmw.add");
+  CheckName(kExprI64AtomicAdd, "i64.atomic.rmw.add");
+  CheckName(kExprI32AtomicAdd8U, "i32.atomic.rmw8.add_u");
+  CheckName(kExprI32AtomicAdd16U, "i32.atomic.rmw16.add_u");
+  CheckName(kExprI64AtomicAdd8U, "i64.atomic.rmw8.add_u");
+  CheckName(kExprI64AtomicAdd16U, "i64.atomic.rmw16.add_u");
+  CheckName(kExprI64AtomicAdd32U, "i64.atomic.rmw32.add_u");
+  CheckName(kExprI32AtomicSub, "i32.atomic.rmw.sub");
+  CheckName(kExprI64AtomicSub, "i64.atomic.rmw.sub");
+  CheckName(kExprI32AtomicSub8U, "i32.atomic.rmw8.sub_u");
+  CheckName(kExprI32AtomicSub16U, "i32.atomic.rmw16.sub_u");
+  CheckName(kExprI64AtomicSub8U, "i64.atomic.rmw8.sub_u");
+  CheckName(kExprI64AtomicSub16U, "i64.atomic.rmw16.sub_u");
+  CheckName(kExprI64AtomicSub32U, "i64.atomic.rmw32.sub_u");
+  CheckName(kExprI32AtomicAnd, "i32.atomic.rmw.and");
+  CheckName(kExprI64AtomicAnd, "i64.atomic.rmw.and");
+  CheckName(kExprI32AtomicAnd8U, "i32.atomic.rmw8.and_u");
+  CheckName(kExprI32AtomicAnd16U, "i32.atomic.rmw16.and_u");
+  CheckName(kExprI64AtomicAnd8U, "i64.atomic.rmw8.and_u");
+  CheckName(kExprI64AtomicAnd16U, "i64.atomic.rmw16.and_u");
+  CheckName(kExprI64AtomicAnd32U, "i64.atomic.rmw32.and_u");
+  CheckName(kExprI32AtomicOr, "i32.atomic.rmw.or");
+  CheckName(kExprI64AtomicOr, "i64.atomic.rmw.or");
+  CheckName(kExprI32AtomicOr8U, "i32.atomic.rmw8.or_u");
+  CheckName(kExprI32AtomicOr16U, "i32.atomic.rmw16.or_u");
+  CheckName(kExprI64AtomicOr8U, "i64.atomic.rmw8.or_u");
+  CheckName(kExprI64AtomicOr16U, "i64.atomic.rmw16.or_u");
+  CheckName(kExprI64AtomicOr32U, "i64.atomic.rmw32.or_u");
+  CheckName(kExprI32AtomicXor, "i32.atomic.rmw.xor");
+  CheckName(kExprI64AtomicXor, "i64.atomic.rmw.xor");
+  CheckName(kExprI32AtomicXor8U, "i32.atomic.rmw8.xor_u");
+  CheckName(kExprI32AtomicXor16U, "i32.atomic.rmw16.xor_u");
+  CheckName(kExprI64AtomicXor8U, "i64.atomic.rmw8.xor_u");
+  CheckName(kExprI64AtomicXor16U, "i64.atomic.rmw16.xor_u");
+  CheckName(kExprI64AtomicXor32U, "i64.atomic.rmw32.xor_u");
+  CheckName(kExprI32AtomicExchange, "i32.atomic.rmw.xchg");
+  CheckName(kExprI64AtomicExchange, "i64.atomic.rmw.xchg");
+  CheckName(kExprI32AtomicExchange8U, "i32.atomic.rmw8.xchg_u");
+  CheckName(kExprI32AtomicExchange16U, "i32.atomic.rmw16.xchg_u");
+  CheckName(kExprI64AtomicExchange8U, "i64.atomic.rmw8.xchg_u");
+  CheckName(kExprI64AtomicExchange16U, "i64.atomic.rmw16.xchg_u");
+  CheckName(kExprI64AtomicExchange32U, "i64.atomic.rmw32.xchg_u");
+  CheckName(kExprI32AtomicCompareExchange, "i32.atomic.rmw.cmpxchg");
+  CheckName(kExprI64AtomicCompareExchange, "i64.atomic.rmw.cmpxchg");
+  CheckName(kExprI32AtomicCompareExchange8U, "i32.atomic.rmw8.cmpxchg_u");
+  CheckName(kExprI32AtomicCompareExchange16U, "i32.atomic.rmw16.cmpxchg_u");
+  CheckName(kExprI64AtomicCompareExchange8U, "i64.atomic.rmw8.cmpxchg_u");
+  CheckName(kExprI64AtomicCompareExchange16U, "i64.atomic.rmw16.cmpxchg_u");
+  CheckName(kExprI64AtomicCompareExchange32U, "i64.atomic.rmw32.cmpxchg_u");
+  // https://github.com/WebAssembly/threads/blob/main/proposals/threads/Overview.md#fence-operator
+  CheckName(kExprAtomicFence, "atomic.fence");
+}
+
+}  // namespace wasm
+}  // namespace internal
+}  // namespace v8