Optimise kArm64Float32ToInt64 and kArm64Float64ToInt64 conversion operations

Change-Id: I4a6d57903016323eba439cd7f959f263d6605c84
Reviewed-on: https://chromium-review.googlesource.com/1169165Reviewed-by: Jaroslav Sevcik <jarin@chromium.org>
Commit-Queue: Bogdan Lazarescu <bogdan.lazarescu@arm.com>
Cr-Commit-Position: refs/heads/master@{#55094}

src/compiler/arm64/code-generator-arm64.cc

@@ -1415,35 +1415,29 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
     case kArm64Float32ToInt64:
       __ Fcvtzs(i.OutputRegister64(), i.InputFloat32Register(0));
       if (i.OutputCount() > 1) {
-        __ Mov(i.OutputRegister(1), 1);
-        Label done;
-        __ Cmp(i.OutputRegister(0), 1);
-        __ Ccmp(i.OutputRegister(0), -1, VFlag, vc);
-        __ Fccmp(i.InputFloat32Register(0), i.InputFloat32Register(0), VFlag,
-                 vc);
-        __ B(vc, &done);
+        // Check for inputs below INT64_MIN and NaN.
         __ Fcmp(i.InputFloat32Register(0), static_cast<float>(INT64_MIN));
-        __ Cset(i.OutputRegister(1), eq);
-        __ Bind(&done);
+        // Check overflow.
+        // -1 value is used to indicate a possible overflow which will occur
+        // when subtracting (-1) from the provided INT64_MAX operand.
+        // OutputRegister(1) is set to 0 if the input was out of range or NaN.
+        __ Ccmp(i.OutputRegister(0), -1, VFlag, ge);
+        __ Cset(i.OutputRegister(1), vc);
       }
       break;
     case kArm64Float64ToInt64:
       __ Fcvtzs(i.OutputRegister(0), i.InputDoubleRegister(0));
       if (i.OutputCount() > 1) {
-        __ Mov(i.OutputRegister(1), 1);
-        Label done;
-        __ Cmp(i.OutputRegister(0), 1);
-        __ Ccmp(i.OutputRegister(0), -1, VFlag, vc);
-        __ Fccmp(i.InputDoubleRegister(0), i.InputDoubleRegister(0), VFlag, vc);
-        __ B(vc, &done);
+        // See kArm64Float32ToInt64 for a detailed description.
         __ Fcmp(i.InputDoubleRegister(0), static_cast<double>(INT64_MIN));
-        __ Cset(i.OutputRegister(1), eq);
-        __ Bind(&done);
+        __ Ccmp(i.OutputRegister(0), -1, VFlag, ge);
+        __ Cset(i.OutputRegister(1), vc);
       }
       break;
     case kArm64Float32ToUint64:
       __ Fcvtzu(i.OutputRegister64(), i.InputFloat32Register(0));
       if (i.OutputCount() > 1) {
+        // See kArm64Float32ToInt64 for a detailed description.
         __ Fcmp(i.InputFloat32Register(0), -1.0);
         __ Ccmp(i.OutputRegister(0), -1, ZFlag, gt);
         __ Cset(i.OutputRegister(1), ne);
@@ -1452,6 +1446,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
     case kArm64Float64ToUint64:
       __ Fcvtzu(i.OutputRegister64(), i.InputDoubleRegister(0));
       if (i.OutputCount() > 1) {
+        // See kArm64Float32ToInt64 for a detailed description.
         __ Fcmp(i.InputDoubleRegister(0), -1.0);
         __ Ccmp(i.OutputRegister(0), -1, ZFlag, gt);
         __ Cset(i.OutputRegister(1), ne);