[mips64][liftoff] Fix i64 clz, ctz, popcnt, shift with immediate.

The previous implementation incorrectly used instructions for 32-bit
data, this CL fixes it to implement 64-bit operations.

Change-Id: Ib8e5236ea35f3a2c0e37e647ea89aad6a1127425
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1928501
Auto-Submit: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Reviewed-by: Bill Budge <bbudge@chromium.org>
Commit-Queue: Bill Budge <bbudge@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65123}

src/codegen/mips64/macro-assembler-mips64.cc

@@ -2990,6 +2990,8 @@ void TurboAssembler::Movf(Register rd, Register rs, uint16_t cc) {
 
 void TurboAssembler::Clz(Register rd, Register rs) { clz(rd, rs); }
 
+void TurboAssembler::Dclz(Register rd, Register rs) { dclz(rd, rs); }
+
 void TurboAssembler::Ctz(Register rd, Register rs) {
   if (kArchVariant == kMips64r6) {
     // We don't have an instruction to count the number of trailing zeroes.

src/codegen/mips64/macro-assembler-mips64.h

@@ -548,6 +548,7 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
                            Condition cond);
 
   void Clz(Register rd, Register rs);
+  void Dclz(Register rd, Register rs);
   void Ctz(Register rd, Register rs);
   void Dctz(Register rd, Register rs);
   void Popcnt(Register rd, Register rs);

src/wasm/baseline/mips64/liftoff-assembler-mips64.h

@@ -559,16 +559,16 @@ void LiftoffAssembler::FillStackSlotsWithZero(uint32_t index, uint32_t count) {
 }
 
 void LiftoffAssembler::emit_i64_clz(LiftoffRegister dst, LiftoffRegister src) {
-  Clz(dst.gp(), src.gp());
+  TurboAssembler::Dclz(dst.gp(), src.gp());
 }
 
 void LiftoffAssembler::emit_i64_ctz(LiftoffRegister dst, LiftoffRegister src) {
-  Ctz(dst.gp(), src.gp());
+  TurboAssembler::Dctz(dst.gp(), src.gp());
 }
 
 bool LiftoffAssembler::emit_i64_popcnt(LiftoffRegister dst,
                                        LiftoffRegister src) {
-  TurboAssembler::Popcnt(dst.gp(), src.gp());
+  TurboAssembler::Dpopcnt(dst.gp(), src.gp());
   return true;
 }
 
@@ -765,7 +765,10 @@ I64_BINOP_I(xor, Xor)
   void LiftoffAssembler::emit_i64_##name(LiftoffRegister dst,               \
                                          LiftoffRegister src, int amount) { \
     DCHECK(is_uint6(amount));                                               \
-    instruction(dst.gp(), src.gp(), amount);                                \
+    if (amount < 32)                                                        \
+      instruction(dst.gp(), src.gp(), amount);                              \
+    else                                                                    \
+      instruction##32(dst.gp(), src.gp(), amount - 32);                     \
   }
 
 I64_SHIFTOP_I(shl, dsll)