[TurboProp] Move CHECKS back to DCHECKS in mid-tier-regalloc

BUG=chromium:1180335

Change-Id: Ic6e4d18595b1003a036d247e8b11b03fcdae9b01
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2821538
Auto-Submit: Ross McIlroy <rmcilroy@chromium.org>
Reviewed-by: Santiago Aboy Solanes <solanes@chromium.org>
Commit-Queue: Ross McIlroy <rmcilroy@chromium.org>
Cr-Commit-Position: refs/heads/master@{#73913}

src/compiler/backend/mid-tier-register-allocator.cc

@@ -587,8 +587,7 @@ void VirtualRegisterData::AddSpillUse(int instr_index,
 
   const InstructionBlock* block = data->GetBlock(instr_index);
   if (CouldSpillOnEntryToDeferred(block)) {
-    // TODO(1180335): Remove once crbug.com/1180335 is fixed.
-    CHECK(HasSpillRange());
+    DCHECK(HasSpillRange());
     data->block_state(block->rpo_number())
         .deferred_blocks_region()
         ->DeferSpillOutputUntilEntry(vreg());
@@ -614,8 +613,7 @@ void VirtualRegisterData::AddDeferredSpillOutput(
     AllocatedOperand allocated_op, int instr_index,
     MidTierRegisterAllocationData* data) {
   DCHECK(!NeedsSpillAtOutput());
-  // TODO(1180335): Make DCHECK once crbug.com/1180335 is fixed.
-  CHECK(HasSpillRange());
+  DCHECK(HasSpillRange());
   spill_range_->AddDeferredSpillOutput(allocated_op, instr_index, data);
 }
 
@@ -937,9 +935,8 @@ void RegisterState::Register::Use(int virtual_register, int instr_index) {
   // A register can have many pending uses, but should only ever have a single
   // non-pending use, since any subsiquent use will commit the preceeding use
   // first.
-  // TODO(1180335): Make DCHECK once crbug.com/1180335 is fixed.
-  CHECK(!is_allocated());
-  CHECK(!is_shared());
+  DCHECK(!is_allocated());
+  DCHECK(!is_shared());
   needs_gap_move_on_spill_ = true;
   virtual_register_ = virtual_register;
   last_use_instr_index_ = instr_index;
@@ -950,8 +947,7 @@ void RegisterState::Register::PendingUse(InstructionOperand* operand,
                                          int virtual_register,
                                          bool can_be_constant,
                                          int instr_index) {
-  // TODO(1180335): Make DCHECK once crbug.com/1180335 is fixed.
-  CHECK(!was_spilled_while_shared());
+  DCHECK(!was_spilled_while_shared());
   if (!is_allocated()) {
     virtual_register_ = virtual_register;
     last_use_instr_index_ = instr_index;
@@ -972,8 +968,7 @@ void RegisterState::Register::MarkAsPhiMove() {
 
 void RegisterState::Register::AddDeferredBlockSpill(int instr_index,
                                                     bool on_exit, Zone* zone) {
-  // TODO(1180335): Make DCHECK once crbug.com/1180335 is fixed.
-  CHECK(is_allocated());
+  DCHECK(is_allocated());
   if (!deferred_block_spills_) {
     deferred_block_spills_.emplace(zone);
   }
@@ -981,16 +976,14 @@ void RegisterState::Register::AddDeferredBlockSpill(int instr_index,
 }
 
 void RegisterState::Register::AddSharedUses(int shared_use_count) {
-  // TODO(1180335): Make DCHECK once crbug.com/1180335 is fixed.
-  CHECK(!was_spilled_while_shared());
+  DCHECK(!was_spilled_while_shared());
   is_shared_ = true;
   num_commits_required_ += shared_use_count;
 }
 
 void RegisterState::Register::CommitAtMerge() {
-  // TODO(1180335): Make DCHECK once crbug.com/1180335 is fixed.
-  CHECK(is_shared());
-  CHECK(is_allocated());
+  DCHECK(is_shared());
+  DCHECK(is_allocated());
   --num_commits_required_;
   // We should still have commits required that will be resolved in the merge
   // block.
@@ -999,9 +992,8 @@ void RegisterState::Register::CommitAtMerge() {
 
 void RegisterState::Register::Commit(AllocatedOperand allocated_op,
                                      MidTierRegisterAllocationData* data) {
-  // TODO(1180335): Make DCHECK once crbug.com/1180335 is fixed.
-  CHECK(is_allocated());
-  CHECK_GT(num_commits_required_, 0);
+  DCHECK(is_allocated());
+  DCHECK_GT(num_commits_required_, 0);
 
   if (--num_commits_required_ == 0) {
     // Allocate all pending uses to |allocated_op| if this commit is non-shared,
@@ -1038,8 +1030,7 @@ void RegisterState::Register::Commit(AllocatedOperand allocated_op,
       vreg_data.EmitDeferredSpillOutputs(data);
     }
   }
-  // TODO(1180335): Make DCHECK once crbug.com/1180335 is fixed.
-  CHECK_IMPLIES(num_commits_required_ > 0, is_shared());
+  DCHECK_IMPLIES(num_commits_required_ > 0, is_shared());
 }
 
 void RegisterState::Register::Spill(AllocatedOperand allocated_op,
@@ -1106,9 +1097,8 @@ void RegisterState::Register::SpillPendingUses(
 void RegisterState::Register::SpillForDeferred(
     AllocatedOperand allocated, int instr_index,
     MidTierRegisterAllocationData* data) {
-  // TODO(1180335): Make DCHECK once crbug.com/1180335 is fixed.
-  CHECK(is_allocated());
-  CHECK(is_shared());
+  DCHECK(is_allocated());
+  DCHECK(is_shared());
   // Add a pending deferred spill, then commit the register (with the commit
   // being fullfilled by the deferred spill if the register is fully commited).
   data->VirtualRegisterDataFor(virtual_register())
@@ -1120,8 +1110,7 @@ void RegisterState::Register::SpillForDeferred(
 void RegisterState::Register::MoveToSpillSlotOnDeferred(
     int virtual_register, int instr_index,
     MidTierRegisterAllocationData* data) {
-  // TODO(1180335): Make DCHECK once crbug.com/1180335 is fixed.
-  CHECK(!was_spilled_while_shared());
+  DCHECK(!was_spilled_while_shared());
   if (!is_allocated()) {
     virtual_register_ = virtual_register;
     last_use_instr_index_ = instr_index;
@@ -2168,8 +2157,7 @@ void SinglePassRegisterAllocator::AllocateDeferredBlockSpillOutput(
     int instr_index, RpoNumber deferred_block,
     VirtualRegisterData& virtual_register) {
   DCHECK(data()->GetBlock(deferred_block)->IsDeferred());
-  // TODO(1180335): Make DCHECK once crbug.com/1180335 is fixed.
-  CHECK(virtual_register.HasSpillRange());
+  DCHECK(virtual_register.HasSpillRange());
   if (!virtual_register.NeedsSpillAtOutput() &&
       !DefinedAfter(virtual_register.vreg(), instr_index, UsePosition::kEnd)) {
     // If a register has been assigned to the virtual register, and the virtual