Commit 0236d7b5 authored by Deepti Gandluri's avatar Deepti Gandluri Committed by V8 LUCI CQ

[wasm-relaxed-simd] Add liftoff min/max operations on Arm and Arm64

Instruction lowering on ARM uses pmin/pmax as there is no hardware support.
More details here: https://github.com/WebAssembly/relaxed-simd/issues/33

Bug: v8:12284
Change-Id: I075d4a6660afc4418fcc91c5d48e8e9096536dc9
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3646075
Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
Reviewed-by: 's avatarThibaud Michaud <thibaudm@chromium.org>
Cr-Commit-Position: refs/heads/main@{#80621}
parent e49f00d4
......@@ -2639,6 +2639,18 @@ void LiftoffAssembler::emit_f64x2_pmax(LiftoffRegister dst, LiftoffRegister lhs,
vmov(dest.high(), right.high(), gt);
}
void LiftoffAssembler::emit_f64x2_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
emit_f64x2_pmin(dst, lhs, rhs);
}
void LiftoffAssembler::emit_f64x2_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
emit_f64x2_pmax(dst, lhs, rhs);
}
void LiftoffAssembler::emit_f64x2_convert_low_i32x4_s(LiftoffRegister dst,
LiftoffRegister src) {
F64x2ConvertLowI32x4S(liftoff::GetSimd128Register(dst),
......@@ -2800,6 +2812,20 @@ void LiftoffAssembler::emit_f32x4_max(LiftoffRegister dst, LiftoffRegister lhs,
liftoff::GetSimd128Register(rhs));
}
void LiftoffAssembler::emit_f32x4_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
vmin(liftoff::GetSimd128Register(dst), liftoff::GetSimd128Register(lhs),
liftoff::GetSimd128Register(rhs));
}
void LiftoffAssembler::emit_f32x4_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
vmax(liftoff::GetSimd128Register(dst), liftoff::GetSimd128Register(lhs),
liftoff::GetSimd128Register(rhs));
}
void LiftoffAssembler::emit_f32x4_pmin(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
UseScratchRegisterScope temps(this);
......
......@@ -1912,6 +1912,18 @@ void LiftoffAssembler::emit_f64x2_pmax(LiftoffRegister dst, LiftoffRegister lhs,
}
}
void LiftoffAssembler::emit_f64x2_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
Fmin(dst.fp().V2D(), lhs.fp().V2D(), rhs.fp().V2D());
}
void LiftoffAssembler::emit_f64x2_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
Fmax(dst.fp().V2D(), lhs.fp().V2D(), rhs.fp().V2D());
}
void LiftoffAssembler::emit_f64x2_convert_low_i32x4_s(LiftoffRegister dst,
LiftoffRegister src) {
Sxtl(dst.fp().V2D(), src.fp().V2S());
......@@ -2019,6 +2031,18 @@ void LiftoffAssembler::emit_f32x4_max(LiftoffRegister dst, LiftoffRegister lhs,
Fmax(dst.fp().V4S(), lhs.fp().V4S(), rhs.fp().V4S());
}
void LiftoffAssembler::emit_f32x4_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
Fmin(dst.fp().V4S(), lhs.fp().V4S(), rhs.fp().V4S());
}
void LiftoffAssembler::emit_f32x4_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
Fmax(dst.fp().V4S(), lhs.fp().V4S(), rhs.fp().V4S());
}
void LiftoffAssembler::emit_f32x4_pmin(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
UseScratchRegisterScope temps(this);
......
......@@ -4035,6 +4035,18 @@ void LiftoffAssembler::emit_f32x4_pmax(LiftoffRegister dst, LiftoffRegister lhs,
this, dst, rhs, lhs);
}
void LiftoffAssembler::emit_f32x4_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f32x4_relaxed_min");
}
void LiftoffAssembler::emit_f32x4_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f32x4_relaxed_max");
}
void LiftoffAssembler::emit_f64x2_abs(LiftoffRegister dst,
LiftoffRegister src) {
Register tmp = GetUnusedRegister(kGpReg, {}).gp();
......@@ -4128,6 +4140,18 @@ void LiftoffAssembler::emit_f64x2_pmax(LiftoffRegister dst, LiftoffRegister lhs,
this, dst, rhs, lhs);
}
void LiftoffAssembler::emit_f64x2_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f64x2_relaxed_min");
}
void LiftoffAssembler::emit_f64x2_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f64x2_relaxed_min");
}
void LiftoffAssembler::emit_f64x2_convert_low_i32x4_s(LiftoffRegister dst,
LiftoffRegister src) {
Cvtdq2pd(dst.fp(), src.fp());
......
......@@ -1362,6 +1362,10 @@ class LiftoffAssembler : public TurboAssembler {
LiftoffRegister rhs);
inline void emit_f32x4_pmax(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs);
inline void emit_f32x4_relaxed_min(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs);
inline void emit_f32x4_relaxed_max(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs);
inline void emit_f64x2_abs(LiftoffRegister dst, LiftoffRegister src);
inline void emit_f64x2_neg(LiftoffRegister dst, LiftoffRegister src);
inline void emit_f64x2_sqrt(LiftoffRegister dst, LiftoffRegister src);
......@@ -1385,6 +1389,10 @@ class LiftoffAssembler : public TurboAssembler {
LiftoffRegister rhs);
inline void emit_f64x2_pmax(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs);
inline void emit_f64x2_relaxed_min(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs);
inline void emit_f64x2_relaxed_max(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs);
inline void emit_f64x2_convert_low_i32x4_s(LiftoffRegister dst,
LiftoffRegister src);
inline void emit_f64x2_convert_low_i32x4_u(LiftoffRegister dst,
......
......@@ -4068,6 +4068,18 @@ class LiftoffCompiler {
case wasm::kExprI32x4RelaxedLaneSelect:
case wasm::kExprI64x2RelaxedLaneSelect:
return EmitRelaxedLaneSelect();
case wasm::kExprF32x4RelaxedMin:
return EmitBinOp<kS128, kS128, false, kF32>(
&LiftoffAssembler::emit_f32x4_relaxed_min);
case wasm::kExprF32x4RelaxedMax:
return EmitBinOp<kS128, kS128, false, kF32>(
&LiftoffAssembler::emit_f32x4_relaxed_max);
case wasm::kExprF64x2RelaxedMin:
return EmitBinOp<kS128, kS128, false, kF64>(
&LiftoffAssembler::emit_f64x2_relaxed_min);
case wasm::kExprF64x2RelaxedMax:
return EmitBinOp<kS128, kS128, false, kF64>(
&LiftoffAssembler::emit_f64x2_relaxed_max);
case wasm::kExprI16x8RelaxedQ15MulRS:
return EmitBinOp<kS128, kS128>(
&LiftoffAssembler::emit_i16x8_relaxed_q15mulr_s);
......
......@@ -3598,6 +3598,18 @@ void LiftoffAssembler::emit_f32x4_pmax(LiftoffRegister dst, LiftoffRegister lhs,
this, dst, rhs, lhs);
}
void LiftoffAssembler::emit_f32x4_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f32x4_relaxed_min");
}
void LiftoffAssembler::emit_f32x4_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f32x4_relaxed_max");
}
void LiftoffAssembler::emit_f64x2_abs(LiftoffRegister dst,
LiftoffRegister src) {
Abspd(dst.fp(), src.fp(), kScratchRegister);
......@@ -3675,6 +3687,18 @@ void LiftoffAssembler::emit_f64x2_max(LiftoffRegister dst, LiftoffRegister lhs,
F64x2Max(dst.fp(), lhs.fp(), rhs.fp(), kScratchDoubleReg);
}
void LiftoffAssembler::emit_f64x2_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f64x2_relaxed_min");
}
void LiftoffAssembler::emit_f64x2_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f64x2_relaxed_max");
}
void LiftoffAssembler::emit_f64x2_pmin(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// Due to the way minpd works, pmin(a, b) = minpd(b, a).
......
......@@ -1194,6 +1194,14 @@
'test-run-wasm-relaxed-simd/RunWasm_F64x2Qfma_liftoff': [SKIP],
'test-run-wasm-relaxed-simd/RunWasm_F64x2Qfms_liftoff': [SKIP],
'test-run-wasm-relaxed-simd/RunWasm_I8x16RelaxedSwizzle_liftoff': [SKIP],
}],
['arch != arm and arch != arm64', {
# TODO(12284): Implement relaxed SIMD in Liftoff.
'test-run-wasm-relaxed-simd/RunWasm_F32x4RelaxedMin_liftoff': [SKIP],
'test-run-wasm-relaxed-simd/RunWasm_F32x4RelaxedMax_liftoff': [SKIP],
'test-run-wasm-relaxed-simd/RunWasm_F64x2RelaxedMin_liftoff': [SKIP],
'test-run-wasm-relaxed-simd/RunWasm_F64x2RelaxedMax_liftoff': [SKIP],
}]
]
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