• Pierre Langlois's avatar
    [arm] Support splitting add with immediate instructions · d5b29f43
    Pierre Langlois authored
    When an immediate does not fit an add instruction we use a temporary register to
    hold the value, using movw/movt to encode it. However, in order to remove a use
    of r9 in TurboFan's code generator, we need to cope with no scratch registers
    being available. That is to say that the destination and source registers are
    the same, and `ip` is not available to use.
    
    In this case, we can split an add instruction into a sequence of additions:
    ```
    UseScratchRegisterScope temps(...);
    Register my_scratch = temps.Acquire();
    __ add(r0, r0, Operand(0xabcd); // add r0, r0, #0xcd
                                    // add r0, r0, #0xab00
    ```
    
    As a drive-by fix, make the disassembler test fail if we expected a different
    number of instructions generated.
    
    Bug: v8:6553
    Change-Id: Ib7fcc765d28bccafe39257f47cd73f922c5873bf
    Reviewed-on: https://chromium-review.googlesource.com/685014Reviewed-by: 's avatarBenedikt Meurer <bmeurer@chromium.org>
    Commit-Queue: Pierre Langlois <pierre.langlois@arm.com>
    Cr-Commit-Position: refs/heads/master@{#48491}
    d5b29f43
test-disasm-arm.cc 63.2 KB