• arajp's avatar
    Make FlushICache NOP for Nvidia Denver CPU's. · f4fb7025
    arajp authored
    Denver supports a coherent cache mechanism. There is no need to clean
    the D cache and invalidate I cache. MTS has to check the translation
    anytime there is an I cache invalidate and this time can be saved by
    making FlushICache a NOP.
    
    The patch improves Octane by roughly 3-4% on Denver.
    
    Review URL: https://codereview.chromium.org/797233002
    
    Cr-Commit-Position: refs/heads/master@{#25898}
    f4fb7025
assembler-arm.cc 128 KB