• Zhi An Ng's avatar
    [wasm-simd][arm64] Prototype load lane and store lane · 6dbc2b01
    Zhi An Ng authored
    Prototype v128.{load,store}{8,16,32,64}_lane on arm64.
    
    All the required assembler, disassembler, and simulator changes are
    already available. The biggest changes here are in the
    instruction-selector. ld1 and st1 only supports no-offset or post-index
    addressing, so we have to do our own addition (base + index) to
    construction the actual memory address to load/store from.
    
    Bug: v8:10975
    Change-Id: I026e3075003ff5dece7cd1a590894b09e2e823db
    Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2558268
    Commit-Queue: Zhi An Ng <zhin@chromium.org>
    Reviewed-by: 's avatarBill Budge <bbudge@chromium.org>
    Cr-Commit-Position: refs/heads/master@{#71551}
    6dbc2b01
instruction-scheduler-arm64.cc 15.2 KB