• pierre.langlois's avatar
    [turbofan] ARM64: Match 64 bit compare with zero and branch · 27bd1747
    pierre.langlois authored
    This patch enables the following transformations in the instruction
    selector:
    
    | Before           | After                  |
    |------------------+------------------------|
    | and x3, x1, #0x1 | tb{,n}z w1, #0, #+0x78 |
    | cmp x3, #0x0     |                        |
    | b.{eq,ne} #+0x80 |                        |
    |------------------+------------------------|
    | cmp x0, #0x0     | cb{,n}z x0, #+0x48     |
    | b.{eq,ne} #+0x4c |                        |
    
    I have not seen these patterns beeing generated by turbofan, however the
    stubs hit these cases frequently. A particular reason is that we are
    turning operations that check for a Smi into a single `tbz`.
    
    As a concequence, the interpreter is affected thanks to inlining
    turbofan stubs into it's bytecode handlers. I have noticed the size of
    the interpreter was reduced by 200 instructions.
    
    BUG=
    
    Review-Url: https://codereview.chromium.org/2022073002
    Cr-Commit-Position: refs/heads/master@{#36632}
    27bd1747
instruction-scheduler-arm64.cc 7.87 KB