• danno@chromium.org's avatar
    MIPS: Branch delay slot and other optimizations. · b49dd13c
    danno@chromium.org authored
    List of changes:
    -added a minor optimization to the Simulator that quickly skips nops in the delay slot
    -slightly re-worked CEntryStub to save a few instructions
     CEntryStub now expects the following values:
      -s0: number of arguments including receiver
      -s1: size of arguments excluding receiver
      -s2: pointer to builtin function
     Two new MacroAssembler functions were added to make usage more convenient:
      -PrepareCEntryArgs(int num_args) to set up s0 and s1
      -PrepareCEntryFunction(const ExternalReference&) to set up s2
    -removed branch delay slot nops from the most frequently used code areas
    -reorganized some code to execute fewer instructions
    -utilized the delay slot of most Ret instructions
     This does not cover all Rets, only the most obvious cases.
     Also added a special version of DropAndRet that utilizes the delay slot.
    -added some comments to code areas where explanation of the register/delay slot usage may be needed
    -added an optimization to Jump so it doesn't always pre-load the target register
    
    BUG=
    TEST=
    
    Review URL: https://chromiumcodereview.appspot.com/9699071
    Patch from Daniel Kalmar <kalmard@homejinni.com>.
    
    git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@11099 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
    b49dd13c
lithium-codegen-mips.cc 173 KB