cpu-mips64.cc 1.19 KB
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// Copyright 2012 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.

// CPU specific code for arm independent of OS goes here.

#include <sys/syscall.h>
#include <unistd.h>

#ifdef __mips
#include <asm/cachectl.h>
#endif  // #ifdef __mips

#if V8_TARGET_ARCH_MIPS64

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#include "src/cpu-features.h"
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namespace v8 {
namespace internal {


void CpuFeatures::FlushICache(void* start, size_t size) {
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#if !defined(USE_SIMULATOR)
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  // Nothing to do, flushing no instructions.
  if (size == 0) {
    return;
  }

#if defined(ANDROID) && !defined(__LP64__)
  // Bionic cacheflush can typically run in userland, avoiding kernel call.
  char *end = reinterpret_cast<char *>(start) + size;
  cacheflush(
    reinterpret_cast<intptr_t>(start), reinterpret_cast<intptr_t>(end), 0);
#else  // ANDROID
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  long res;  // NOLINT(runtime/int)
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  // See http://www.linux-mips.org/wiki/Cacheflush_Syscall.
  res = syscall(__NR_cacheflush, start, size, ICACHE);
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  if (res) FATAL("Failed to flush the instruction cache");
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#endif  // ANDROID
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#endif  // !USE_SIMULATOR.
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}

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}  // namespace internal
}  // namespace v8
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#endif  // V8_TARGET_ARCH_MIPS64