- 04 Dec, 2015 1 commit
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Vicente Olivert Riera authored
Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com> Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
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- 07 Jul, 2015 1 commit
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周晓勇 authored
Signed-off-by: ZhouXiaoyong <zhouxiaoyong@loongson.cn> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
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- 31 May, 2015 1 commit
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Luca Barbato authored
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- 27 Apr, 2015 1 commit
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ZhouXiaoyong authored
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
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- 17 Apr, 2015 1 commit
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Shivraj Patil authored
Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com> Reviewed-by: Nedeljko Babic <Nedeljko.Babic@imgtec.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
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- 06 Mar, 2015 1 commit
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James Cowgill authored
There are no independant uses of mips32r2 instructions except for the FPU parts. Due to the heavy use of mips32r2 specifc fpu extensions, I am guessing the original author intended MIPSFPU to imply MIPS32R2 anyway. Since these fpu instructions are available on mips64 (non-r2), enable them there as well. Also remove the last occurence of HAVE_MIPS32R2 (which is coupled to HAVE_MIPSFPU anyway). mips32r2 is left in the list of options form compatability so that using --disable-mips32r2 doesn't break anything. Signed-off-by: James Cowgill <james410@cowgill.org.uk> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
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- 06 Apr, 2014 1 commit
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Janne Grunau authored
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- 13 Mar, 2014 1 commit
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Diego Biurrun authored
SPARC is no longer being used in any multimedia-related fields and the VIS optimizations only represent a maintenance burden.
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- 07 Dec, 2012 1 commit
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Mans Rullgard authored
This is consistent with usual ARM nomenclature as well as with the VFPV3 and NEON symbols which both lack the ARM prefix. Signed-off-by: Mans Rullgard <mans@mansr.com>
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- 12 Oct, 2012 1 commit
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Diego Biurrun authored
The code fails to compile and is broken beyond repair.
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- 11 Jun, 2012 1 commit
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Nedeljko Babic authored
AMR NB and WB decoders are optimized for MIPS architecture. Appropriate Makefiles are changed accordingly. Cnfigure script is changed in order to support optimizations. Optimizations are enabled by default when compiling is done for mips architecture. Appropriate cflags are automatically set. Support for several mips CPUs is added in configure script. New ffmpeg options are added for disabling optimizations. The FFMPEG option --disable-mipsfpu disables MIPS floating point optimizations. The FFMPEG option --disable-mips32r2 disables MIPS32R2 optimizations. The FFMPEG option --disable-mipsdspr1 disables MIPS DSP ASE R1 optimizations. The FFMPEG option --disable-mipsdspr2 disables MIPS DSP ASE R2 optimizations. Signed-off-by: Nedeljko Babic <nbabic@mips.com> Reviewed-by: Vitor Sessak <vitor1001@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
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- 12 Apr, 2012 1 commit
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Diego Biurrun authored
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