1. 07 Aug, 2012 1 commit
  2. 03 May, 2012 1 commit
  3. 02 May, 2012 2 commits
    • Mans Rullgard's avatar
      arm: intreadwrite: disable inline asm for gcc 4.7 and later · ababec7b
      Mans Rullgard authored
      Starting with version 4.7, gcc properly supports unaligned
      memory accesses on ARM.  Not using the inline asm with these
      compilers results in better code.
      Signed-off-by: 's avatarMans Rullgard <mans@mansr.com>
      ababec7b
    • Mans Rullgard's avatar
      arm: intreadwrite: fix inline asm constraints for gcc 4.6 and later · adebad07
      Mans Rullgard authored
      With a dereferenced type-cast pointer as memory operand, gcc 4.6
      and later will sometimes copy the data to a temporary location,
      the address of which is used as the operand value, if it thinks
      the target address might be misaligned.  Using a pointer to a
      packed struct type instead does the right thing.
      
      The 16-bit case is special since the ldrh instruction addressing
      modes are limited compared to ldr.  The "Uq" constraint produces a
      memory reference suitable for an ldrsb instruction, which supports
      the same addressing modes as ldrh.  However, the restrictions appear
      to apply only when the operand addresses a single byte.  The memory
      reference must thus be split into two operands each targeting one
      byte.  Finally, the "Uq" constraint is only available in ARM mode.
      The Thumb-2 ldrh instruction supports most addressing modes so the
      normal "m" constraint can be used there.
      Signed-off-by: 's avatarMans Rullgard <mans@mansr.com>
      adebad07
  4. 30 May, 2011 1 commit
  5. 19 Mar, 2011 1 commit
  6. 26 Sep, 2010 1 commit
  7. 18 Jan, 2010 1 commit
  8. 16 Aug, 2009 1 commit
  9. 18 Apr, 2009 1 commit
    • Måns Rullgård's avatar
      ARM asm for AV_RN*() · 3c55ce03
      Måns Rullgård authored
      ARMv6 and later support unaligned loads and stores for single
      word/halfword but not double/multiple.  GCC is ignorant of this and
      will always use bytewise accesses for unaligned data.  Casting to an
      int32_t pointer is dangerous since a load/store double or multiple
      instruction might be used (this happens with some code in FFmpeg).
      Implementing the AV_[RW]* macros with inline asm using only supported
      instructions gives fast and safe unaligned accesses.  ARM RVCT does
      the right thing with generic code.
      
      This gives an overall speedup of up to 10%.
      
      Originally committed as revision 18601 to svn://svn.ffmpeg.org/ffmpeg/trunk
      3c55ce03