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  1. 11 Sep, 2012 1 commit
  3. 10 Sep, 2012 1 commit
  5. 08 Sep, 2012 2 commits
  7. 07 Sep, 2012 1 commit
  9. 04 Sep, 2012 3 commits
  11. 02 Sep, 2012 1 commit
  13. 01 Sep, 2012 1 commit
  15. 31 Aug, 2012 1 commit
  17. 30 Aug, 2012 4 commits
  19. 28 Aug, 2012 2 commits
  21. 20 Aug, 2012 1 commit
  23. 19 Aug, 2012 1 commit
  25. 16 Aug, 2012 1 commit
  27. 15 Aug, 2012 1 commit
  29. 13 Aug, 2012 2 commits
    • Mans Rullgard's avatar
      x86: swscale: fix fragile memory accesses · 90540c2d
      Mans Rullgard authored 
      To access data at multiple fixed offsets from a base address, this
code uses a single "m" operand and code of the form "32%0", relying on
the memory operand instantiation having no displacement, giving a final
result of the form "32(%rax)".  If the compiler uses a register and
displacement, e.g. "64(%rax)", the end result becomes "3264(%rax)",
which obviously does not work.

Replacing the "m" operands with "r" operands allows safe addition of a
displacement.  In theory, multiple memory operands could use a shared
base register with different index registers, "(%rax,%rbx)", potentially
making more efficient use of registers.  In the cases at hand, no such
sharing is possible since the addresses involved are entirely unrelated.

After this change, the code somewhat rudely accesses memory without
using a corresponding memory operand, which in some cases can lead to
unwanted "optimisations" of surrounding code.  However, the original
code also accesses memory not covered by a memory operand, so this is
not adding any defect not already present.  It is also hightly unlikely
that any such optimisations could be performed here since the memory
locations in questions are not accessed elsewhere in the same functions.

This fixes crashes with suncc.
Signed-off-by: 's avatarMans Rullgard <mans@mansr.com>
      90540c2d
    • Mans Rullgard's avatar
      x86: swscale: remove disabled code · 10b83cb6
      Mans Rullgard authored 
      This code has been disabled since 2003.  Nobody will ever look at
it again.
Signed-off-by: 's avatarMans Rullgard <mans@mansr.com>
      10b83cb6
  31. 12 Aug, 2012 1 commit
    • Reimar Döffinger's avatar
      Optimized unscaled yuvp9/yuvp10 -> yuvp16 conversion. · 118bd609
      Reimar Döffinger authored 
      About 30% faster on 32 bit Atom, 120% faster on 64 bit Phenom2.
This is interesting because supporting P16 is easier in e.g.
OpenGL (can misuse support for any 2-component 8 bit format),
whereas supporting p9/p10 without conversion needs a texture
format with at least 14 bits actual precision.
The shiftonly == 0 case is not optimized since the code is more
complex and the speed gain less obvious.
Signed-off-by: 's avatarReimar Döffinger <Reimar.Doeffinger@gmx.de>
      118bd609
  33. 08 Aug, 2012 1 commit
  35. 03 Aug, 2012 1 commit
    • Diego Biurrun's avatar
      x86: build: replace mmx2 by mmxext · 239fdf1b
      Diego Biurrun authored 
      Refactoring mmx2/mmxext YASM code with cpuflags will force renames.
So switching to a consistent naming scheme beforehand is sensible.
The name "mmxext" is more official and widespread and also the name
of the CPU flag, as reported e.g. by the Linux kernel.
      239fdf1b
  37. 30 Jul, 2012 1 commit
  39. 23 Jul, 2012 1 commit
  41. 22 Jul, 2012 3 commits
  43. 21 Jul, 2012 1 commit
  45. 19 Jul, 2012 3 commits
  47. 18 Jul, 2012 3 commits
  49. 17 Jul, 2012 2 commits