Commit f6d1338c authored by Guillaume Poirier's avatar Guillaume Poirier

Add the rest of missing Reg_* macros to support both AMD-64 style regs and IA32 regs.

Not used yet, but should be once the SIMD code to accelerate Snow decoding is merged.

Originally committed as revision 4731 to svn://svn.ffmpeg.org/ffmpeg/trunk
parent 5a872801
...@@ -7,8 +7,18 @@ ...@@ -7,8 +7,18 @@
#ifdef ARCH_X86_64 #ifdef ARCH_X86_64
# define REG_a "rax" # define REG_a "rax"
# define REG_b "rbx"
# define REG_c "rcx"
# define REG_d "rdx"
# define REG_D "rdi"
# define REG_S "rsi"
#else #else
# define REG_a "eax" # define REG_a "eax"
# define REG_b "ebx"
# define REG_c "ecx"
# define REG_d "edx"
# define REG_D "edi"
# define REG_S "esi"
#endif #endif
/* /*
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment