Merge commit '90b1b935'

* commit '90b1b935':
  arm: add ff_int32_to_float_fmul_array8_neon
Merged-by: Hendrik Leppkes <h.leppkes@gmail.com>

libavcodec/arm/fmtconvert_init_arm.c

@@ -25,6 +25,9 @@
 #include "libavcodec/avcodec.h"
 #include "libavcodec/fmtconvert.h"
 
+void ff_int32_to_float_fmul_array8_neon(FmtConvertContext *c, float *dst,
+                                        const int32_t *src, const float *mul,
+                                        int len);
 void ff_int32_to_float_fmul_scalar_neon(float *dst, const int32_t *src,
                                         float mul, int len);
 
@@ -46,6 +49,7 @@ av_cold void ff_fmt_convert_init_arm(FmtConvertContext *c, AVCodecContext *avctx
     }
 
     if (have_neon(cpu_flags)) {
+        c->int32_to_float_fmul_array8 = ff_int32_to_float_fmul_array8_neon;
         c->int32_to_float_fmul_scalar = ff_int32_to_float_fmul_scalar_neon;
     }
 }

libavcodec/arm/fmtconvert_neon.S

 /*
  * ARM NEON optimised Format Conversion Utils
  * Copyright (c) 2008 Mans Rullgard <mans@mansr.com>
+ * Copyright (c) 2015 Janne Grunau  <janne-libav@jannau.net>b
  *
  * This file is part of FFmpeg.
  *
@@ -49,3 +50,39 @@ NOVFP   len     .req    r3
         bx              lr
         .unreq  len
 endfunc
+
+function ff_int32_to_float_fmul_array8_neon, export=1
+        ldr             r0,  [sp]
+        lsr             r0,  r0,  #3
+        subs            r0,  r0,  #1
+        beq             1f
+2:
+        vld1.32         {q0-q1},   [r2,:128]!
+        vld1.32         {q2-q3},   [r2,:128]!
+        vld1.32         {d20},     [r3]!
+        subs            r0,  r0,  #2
+        vcvt.f32.s32    q0,  q0
+        vcvt.f32.s32    q1,  q1
+        vdup.32         q8,  d20[0]
+        vcvt.f32.s32    q2,  q2
+        vcvt.f32.s32    q3,  q3
+        vmul.f32        q0,  q0,  q8
+        vdup.32         q9,  d20[1]
+        vmul.f32        q1,  q1,  q8
+        vmul.f32        q2,  q2,  q9
+        vmul.f32        q3,  q3,  q9
+        vst1.32         {q0-q1},   [r1,:128]!
+        vst1.32         {q2-q3},   [r1,:128]!
+        bgt             2b
+        it              lt
+        bxlt            lr
+1:
+        vld1.32         {q0-q1},   [r2,:128]
+        vld1.32         {d16[],d17[]},  [r3]
+        vcvt.f32.s32    q0,  q0
+        vcvt.f32.s32    q1,  q1
+        vmul.f32        q0,  q0,  q8
+        vmul.f32        q1,  q1,  q8
+        vst1.32         {q0-q1},   [r1,:128]
+        bx              lr
+endfunc