avutil/mips: Avoid instruction exception caused by gssqc1/gslqc1.

Ensure the address accesed by gssqc1/gslqc1 are 16-byte aligned.

avutil/mips: Avoid instruction exception caused by gssqc1/gslqc1.
Ensure the address accesed by gssqc1/gslqc1 are 16-byte aligned.
11f99a9a · Shiyou Yin · Reimar Döffinger · 9a2dbfde · 11f99a9a · 11f99a9a
Commit 11f99a9a authored Jul 31, 2019 by Shiyou Yin Committed by Reimar Döffinger Aug 02, 2019
Hide whitespace changes
Inline Side-by-side

Showing with 2 additions and 2 deletions

simple_idct_mmi.c libavcodec/mips/simple_idct_mmi.c +1 -1

mmiutils.h libavutil/mips/mmiutils.h +1 -1

No files found.
--- a/libavcodec/mips/simple_idct_mmi.c
+++ b/libavcodec/mips/simple_idct_mmi.c
@@ -39,7 +39,7 @@
 #define COL_SHIFT 20
 #define DC_SHIFT 3

-DECLARE_ALIGNED(8, const int16_t, W_arr)[46] = {
+DECLARE_ALIGNED(16, const int16_t, W_arr)[46] = {
    W4,  W2,  W4,  W6,
    W1,  W3,  W5,  W7,
    W4,  W6, -W4, -W2,

--- a/libavutil/mips/mmiutils.h
+++ b/libavutil/mips/mmiutils.h
@@ -205,7 +205,7 @@
 * backup register
 */
 #define BACKUP_REG \
-  double temp_backup_reg[8];                                    \
+  LOCAL_ALIGNED_16(double, temp_backup_reg, [8]);               \
  if (_MIPS_SIM == _ABI64)                                      \
    __asm__ volatile (                                          \
      "gssqc1       $f25,      $f24,       0x00(%[temp])  \n\t" \