vp9intrapred.asm 62.2 KB
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;******************************************************************************
;* VP9 Intra prediction SIMD optimizations
;*
;* Copyright (c) 2013 Ronald S. Bultje <rsbultje gmail com>
;*
;* Parts based on:
;* H.264 intra prediction asm optimizations
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;* Copyright (c) 2010 Fiona Glaser
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;* Copyright (c) 2010 Holger Lubitz
;* Copyright (c) 2010 Loren Merritt
;* Copyright (c) 2010 Ronald S. Bultje
;*
;* This file is part of FFmpeg.
;*
;* FFmpeg is free software; you can redistribute it and/or
;* modify it under the terms of the GNU Lesser General Public
;* License as published by the Free Software Foundation; either
;* version 2.1 of the License, or (at your option) any later version.
;*
;* FFmpeg is distributed in the hope that it will be useful,
;* but WITHOUT ANY WARRANTY; without even the implied warranty of
;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
;* Lesser General Public License for more details.
;*
;* You should have received a copy of the GNU Lesser General Public
;* License along with FFmpeg; if not, write to the Free Software
;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
;******************************************************************************

%include "libavutil/x86/x86util.asm"

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SECTION_RODATA 32
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pw_m256: times 16 dw -256
pw_m255: times 16 dw -255
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pw_4096: times 8 dw 4096

pb_4x3_4x2_4x1_4x0: times 4 db 3
                    times 4 db 2
                    times 4 db 1
                    times 4 db 0
pb_8x1_8x0:   times 8 db 1
              times 8 db 0
pb_8x3_8x2:   times 8 db 3
              times 8 db 2
pb_0to5_2x7:  db 0, 1, 2, 3, 4, 5, 7, 7
              times 8 db -1
pb_0to6_9x7:  db 0, 1, 2, 3, 4, 5, 6
              times 9 db 7
pb_1to6_10x7: db 1, 2, 3, 4, 5, 6
              times 10 db 7
pb_2to6_3x7:
pb_2to6_11x7: db 2, 3, 4, 5, 6
              times 11 db 7
pb_1toE_2xF:  db 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15
pb_2toE_3xF:  db 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15
pb_13456_3xm1: db 1, 3, 4, 5, 6
               times 3 db -1
pb_6012_4xm1: db 6, 0, 1, 2
              times 4 db -1
pb_6xm1_246_8toE: times 6 db -1
                  db 2, 4, 6, 8, 9, 10, 11, 12, 13, 14
pb_6xm1_BDF_0to6: times 6 db -1
                  db 11, 13, 15, 0, 1, 2, 3, 4, 5, 6
pb_02468ACE_13579BDF: db 0, 2, 4, 6, 8, 10, 12, 14, 1, 3, 5, 7, 9, 11, 13, 15

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pb_15x0_1xm1: times 15 db 0
              db -1
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pb_0to2_5x3: db 0, 1, 2
             times 5 db 3
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pb_6xm1_2x0: times 6 db -1
             times 2 db 0
pb_6x0_2xm1: times 6 db 0
             times 2 db -1
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cextern pb_1
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cextern pb_2
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cextern pb_3
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cextern pb_15
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cextern pw_2
cextern pw_4
cextern pw_8
cextern pw_16
cextern pw_32
cextern pw_255
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cextern pw_512
cextern pw_1024
cextern pw_2048
cextern pw_8192
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SECTION .text

; dc_NxN(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)

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%macro DC_4to8_FUNCS 0
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cglobal vp9_ipred_dc_4x4, 4, 4, 0, dst, stride, l, a
    movd                    m0, [lq]
    punpckldq               m0, [aq]
    pxor                    m1, m1
    psadbw                  m0, m1
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%if cpuflag(ssse3)
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    pmulhrsw                m0, [pw_4096]
    pshufb                  m0, m1
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%else
    paddw                   m0, [pw_4]
    psraw                   m0, 3
    punpcklbw               m0, m0
    pshufw                  m0, m0, q0000
%endif
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    movd      [dstq+strideq*0], m0
    movd      [dstq+strideq*1], m0
    lea                   dstq, [dstq+strideq*2]
    movd      [dstq+strideq*0], m0
    movd      [dstq+strideq*1], m0
    RET

cglobal vp9_ipred_dc_8x8, 4, 4, 0, dst, stride, l, a
    movq                    m0, [lq]
    movq                    m1, [aq]
    DEFINE_ARGS dst, stride, stride3
    lea               stride3q, [strideq*3]
    pxor                    m2, m2
    psadbw                  m0, m2
    psadbw                  m1, m2
    paddw                   m0, m1
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%if cpuflag(ssse3)
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    pmulhrsw                m0, [pw_2048]
    pshufb                  m0, m2
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%else
    paddw                   m0, [pw_8]
    psraw                   m0, 4
    punpcklbw               m0, m0
    pshufw                  m0, m0, q0000
%endif
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    movq      [dstq+strideq*0], m0
    movq      [dstq+strideq*1], m0
    movq      [dstq+strideq*2], m0
    movq      [dstq+stride3q ], m0
    lea                   dstq, [dstq+strideq*4]
    movq      [dstq+strideq*0], m0
    movq      [dstq+strideq*1], m0
    movq      [dstq+strideq*2], m0
    movq      [dstq+stride3q ], m0
    RET
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%endmacro
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INIT_MMX mmxext
DC_4to8_FUNCS
INIT_MMX ssse3
DC_4to8_FUNCS

%macro DC_16to32_FUNCS 0
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cglobal vp9_ipred_dc_16x16, 4, 4, 3, dst, stride, l, a
    mova                    m0, [lq]
    mova                    m1, [aq]
    DEFINE_ARGS dst, stride, stride3, cnt
    lea               stride3q, [strideq*3]
    pxor                    m2, m2
    psadbw                  m0, m2
    psadbw                  m1, m2
    paddw                   m0, m1
    movhlps                 m1, m0
    paddw                   m0, m1
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%if cpuflag(ssse3)
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    pmulhrsw                m0, [pw_1024]
    pshufb                  m0, m2
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%else
    paddw                   m0, [pw_16]
    psraw                   m0, 5
    punpcklbw               m0, m0
    pshuflw                 m0, m0, q0000
    punpcklqdq              m0, m0
%endif
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    mov                   cntd, 4
.loop:
    mova      [dstq+strideq*0], m0
    mova      [dstq+strideq*1], m0
    mova      [dstq+strideq*2], m0
    mova      [dstq+stride3q ], m0
    lea                   dstq, [dstq+strideq*4]
    dec                   cntd
    jg .loop
    RET

cglobal vp9_ipred_dc_32x32, 4, 4, 5, dst, stride, l, a
    mova                    m0, [lq]
    mova                    m1, [lq+16]
    mova                    m2, [aq]
    mova                    m3, [aq+16]
    DEFINE_ARGS dst, stride, stride3, cnt
    lea               stride3q, [strideq*3]
    pxor                    m4, m4
    psadbw                  m0, m4
    psadbw                  m1, m4
    psadbw                  m2, m4
    psadbw                  m3, m4
    paddw                   m0, m1
    paddw                   m2, m3
    paddw                   m0, m2
    movhlps                 m1, m0
    paddw                   m0, m1
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%if cpuflag(ssse3)
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    pmulhrsw                m0, [pw_512]
    pshufb                  m0, m4
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%else
    paddw                   m0, [pw_32]
    psraw                   m0, 6
    punpcklbw               m0, m0
    pshuflw                 m0, m0, q0000
    punpcklqdq              m0, m0
%endif
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    mov                   cntd, 8
.loop:
    mova   [dstq+strideq*0+ 0], m0
    mova   [dstq+strideq*0+16], m0
    mova   [dstq+strideq*1+ 0], m0
    mova   [dstq+strideq*1+16], m0
    mova   [dstq+strideq*2+ 0], m0
    mova   [dstq+strideq*2+16], m0
    mova   [dstq+stride3q + 0], m0
    mova   [dstq+stride3q +16], m0
    lea                   dstq, [dstq+strideq*4]
    dec                   cntd
    jg .loop
    RET
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%endmacro

INIT_XMM sse2
DC_16to32_FUNCS
INIT_XMM ssse3
DC_16to32_FUNCS
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%if HAVE_AVX2_EXTERNAL
INIT_YMM avx2
cglobal vp9_ipred_dc_32x32, 4, 4, 3, dst, stride, l, a
    mova                    m0, [lq]
    mova                    m1, [aq]
    DEFINE_ARGS dst, stride, stride3, cnt
    lea               stride3q, [strideq*3]
    pxor                    m2, m2
    psadbw                  m0, m2
    psadbw                  m1, m2
    paddw                   m0, m1
    vextracti128           xm1, m0, 1
    paddw                  xm0, xm1
    movhlps                xm1, xm0
    paddw                  xm0, xm1
    pmulhrsw               xm0, [pw_512]
    vpbroadcastb            m0, xm0
    mov                   cntd, 4
.loop:
    mova      [dstq+strideq*0], m0
    mova      [dstq+strideq*1], m0
    mova      [dstq+strideq*2], m0
    mova      [dstq+stride3q ], m0
    lea                   dstq, [dstq+strideq*4]
    mova      [dstq+strideq*0], m0
    mova      [dstq+strideq*1], m0
    mova      [dstq+strideq*2], m0
    mova      [dstq+stride3q ], m0
    lea                   dstq, [dstq+strideq*4]
    dec                   cntd
    jg .loop
    RET
%endif

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; dc_top/left_NxN(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a)

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%macro DC_1D_4to8_FUNCS 2 ; dir (top or left), arg (a or l)
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cglobal vp9_ipred_dc_%1_4x4, 4, 4, 0, dst, stride, l, a
    movd                    m0, [%2q]
    pxor                    m1, m1
    psadbw                  m0, m1
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%if cpuflag(ssse3)
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    pmulhrsw                m0, [pw_8192]
    pshufb                  m0, m1
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%else
    paddw                   m0, [pw_2]
    psraw                   m0, 2
    punpcklbw               m0, m0
    pshufw                  m0, m0, q0000
%endif
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    movd      [dstq+strideq*0], m0
    movd      [dstq+strideq*1], m0
    lea                   dstq, [dstq+strideq*2]
    movd      [dstq+strideq*0], m0
    movd      [dstq+strideq*1], m0
    RET

cglobal vp9_ipred_dc_%1_8x8, 4, 4, 0, dst, stride, l, a
    movq                    m0, [%2q]
    DEFINE_ARGS dst, stride, stride3
    lea               stride3q, [strideq*3]
    pxor                    m1, m1
    psadbw                  m0, m1
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%if cpuflag(ssse3)
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    pmulhrsw                m0, [pw_4096]
    pshufb                  m0, m1
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%else
    paddw                   m0, [pw_4]
    psraw                   m0, 3
    punpcklbw               m0, m0
    pshufw                  m0, m0, q0000
%endif
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    movq      [dstq+strideq*0], m0
    movq      [dstq+strideq*1], m0
    movq      [dstq+strideq*2], m0
    movq      [dstq+stride3q ], m0
    lea                   dstq, [dstq+strideq*4]
    movq      [dstq+strideq*0], m0
    movq      [dstq+strideq*1], m0
    movq      [dstq+strideq*2], m0
    movq      [dstq+stride3q ], m0
    RET
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%endmacro
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INIT_MMX mmxext
DC_1D_4to8_FUNCS top,  a
DC_1D_4to8_FUNCS left, l
INIT_MMX ssse3
DC_1D_4to8_FUNCS top,  a
DC_1D_4to8_FUNCS left, l

%macro DC_1D_16to32_FUNCS 2; dir (top or left), arg (a or l)
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cglobal vp9_ipred_dc_%1_16x16, 4, 4, 3, dst, stride, l, a
    mova                    m0, [%2q]
    DEFINE_ARGS dst, stride, stride3, cnt
    lea               stride3q, [strideq*3]
    pxor                    m2, m2
    psadbw                  m0, m2
    movhlps                 m1, m0
    paddw                   m0, m1
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%if cpuflag(ssse3)
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    pmulhrsw                m0, [pw_2048]
    pshufb                  m0, m2
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%else
    paddw                   m0, [pw_8]
    psraw                   m0, 4
    punpcklbw               m0, m0
    pshuflw                 m0, m0, q0000
    punpcklqdq              m0, m0
%endif
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    mov                   cntd, 4
.loop:
    mova      [dstq+strideq*0], m0
    mova      [dstq+strideq*1], m0
    mova      [dstq+strideq*2], m0
    mova      [dstq+stride3q ], m0
    lea                   dstq, [dstq+strideq*4]
    dec                   cntd
    jg .loop
    RET

cglobal vp9_ipred_dc_%1_32x32, 4, 4, 3, dst, stride, l, a
    mova                    m0, [%2q]
    mova                    m1, [%2q+16]
    DEFINE_ARGS dst, stride, stride3, cnt
    lea               stride3q, [strideq*3]
    pxor                    m2, m2
    psadbw                  m0, m2
    psadbw                  m1, m2
    paddw                   m0, m1
    movhlps                 m1, m0
    paddw                   m0, m1
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%if cpuflag(ssse3)
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    pmulhrsw                m0, [pw_1024]
    pshufb                  m0, m2
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%else
    paddw                   m0, [pw_16]
    psraw                   m0, 5
    punpcklbw               m0, m0
    pshuflw                 m0, m0, q0000
    punpcklqdq              m0, m0
%endif
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    mov                   cntd, 8
.loop:
    mova   [dstq+strideq*0+ 0], m0
    mova   [dstq+strideq*0+16], m0
    mova   [dstq+strideq*1+ 0], m0
    mova   [dstq+strideq*1+16], m0
    mova   [dstq+strideq*2+ 0], m0
    mova   [dstq+strideq*2+16], m0
    mova   [dstq+stride3q + 0], m0
    mova   [dstq+stride3q +16], m0
    lea                   dstq, [dstq+strideq*4]
    dec                   cntd
    jg .loop
    RET
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%endmacro

INIT_XMM sse2
DC_1D_16to32_FUNCS top,  a
DC_1D_16to32_FUNCS left, l
INIT_XMM ssse3
DC_1D_16to32_FUNCS top,  a
DC_1D_16to32_FUNCS left, l
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%macro DC_1D_AVX2_FUNCS 2 ; dir (top or left), arg (a or l)
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%if HAVE_AVX2_EXTERNAL
cglobal vp9_ipred_dc_%1_32x32, 4, 4, 3, dst, stride, l, a
    mova                    m0, [%2q]
    DEFINE_ARGS dst, stride, stride3, cnt
    lea               stride3q, [strideq*3]
    pxor                    m2, m2
    psadbw                  m0, m2
    vextracti128           xm1, m0, 1
    paddw                  xm0, xm1
    movhlps                xm1, xm0
    paddw                  xm0, xm1
    pmulhrsw               xm0, [pw_1024]
    vpbroadcastb            m0, xm0
    mov                   cntd, 4
.loop:
    mova      [dstq+strideq*0], m0
    mova      [dstq+strideq*1], m0
    mova      [dstq+strideq*2], m0
    mova      [dstq+stride3q ], m0
    lea                   dstq, [dstq+strideq*4]
    mova      [dstq+strideq*0], m0
    mova      [dstq+strideq*1], m0
    mova      [dstq+strideq*2], m0
    mova      [dstq+stride3q ], m0
    lea                   dstq, [dstq+strideq*4]
    dec                   cntd
    jg .loop
    RET
%endif
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%endmacro

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INIT_YMM avx2
DC_1D_AVX2_FUNCS top,  a
DC_1D_AVX2_FUNCS left, l
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; v

INIT_MMX mmx
cglobal vp9_ipred_v_8x8, 4, 4, 0, dst, stride, l, a
    movq                    m0, [aq]
    DEFINE_ARGS dst, stride, stride3
    lea               stride3q, [strideq*3]
    movq      [dstq+strideq*0], m0
    movq      [dstq+strideq*1], m0
    movq      [dstq+strideq*2], m0
    movq      [dstq+stride3q ], m0
    lea                   dstq, [dstq+strideq*4]
    movq      [dstq+strideq*0], m0
    movq      [dstq+strideq*1], m0
    movq      [dstq+strideq*2], m0
    movq      [dstq+stride3q ], m0
    RET

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INIT_XMM sse
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cglobal vp9_ipred_v_16x16, 4, 4, 1, dst, stride, l, a
    mova                    m0, [aq]
    DEFINE_ARGS dst, stride, stride3, cnt
    lea               stride3q, [strideq*3]
    mov                   cntd, 4
.loop:
    mova      [dstq+strideq*0], m0
    mova      [dstq+strideq*1], m0
    mova      [dstq+strideq*2], m0
    mova      [dstq+stride3q ], m0
    lea                   dstq, [dstq+strideq*4]
    dec                   cntd
    jg .loop
    RET

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INIT_XMM sse
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cglobal vp9_ipred_v_32x32, 4, 4, 2, dst, stride, l, a
    mova                    m0, [aq]
    mova                    m1, [aq+16]
    DEFINE_ARGS dst, stride, stride3, cnt
    lea               stride3q, [strideq*3]
    mov                   cntd, 8
.loop:
    mova   [dstq+strideq*0+ 0], m0
    mova   [dstq+strideq*0+16], m1
    mova   [dstq+strideq*1+ 0], m0
    mova   [dstq+strideq*1+16], m1
    mova   [dstq+strideq*2+ 0], m0
    mova   [dstq+strideq*2+16], m1
    mova   [dstq+stride3q + 0], m0
    mova   [dstq+stride3q +16], m1
    lea                   dstq, [dstq+strideq*4]
    dec                   cntd
    jg .loop
    RET

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INIT_YMM avx
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cglobal vp9_ipred_v_32x32, 4, 4, 1, dst, stride, l, a
    mova                    m0, [aq]
    DEFINE_ARGS dst, stride, stride3, cnt
    lea               stride3q, [strideq*3]
    mov                   cntd, 4
.loop:
    mova      [dstq+strideq*0], m0
    mova      [dstq+strideq*1], m0
    mova      [dstq+strideq*2], m0
    mova      [dstq+stride3q ], m0
    lea                   dstq, [dstq+strideq*4]
    mova      [dstq+strideq*0], m0
    mova      [dstq+strideq*1], m0
    mova      [dstq+strideq*2], m0
    mova      [dstq+stride3q ], m0
    lea                   dstq, [dstq+strideq*4]
    dec                   cntd
    jg .loop
    RET

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; h

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%macro H_XMM_FUNCS 2
%if notcpuflag(avx)
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cglobal vp9_ipred_h_4x4, 3, 4, 1, dst, stride, l, stride3
    movd                    m0, [lq]
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%if cpuflag(ssse3)
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    pshufb                  m0, [pb_4x3_4x2_4x1_4x0]
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%else
    punpcklbw               m0, m0
    pshuflw                 m0, m0, q0123
    punpcklwd               m0, m0
%endif
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    lea               stride3q, [strideq*3]
    movd      [dstq+strideq*0], m0
    psrldq                  m0, 4
    movd      [dstq+strideq*1], m0
    psrldq                  m0, 4
    movd      [dstq+strideq*2], m0
    psrldq                  m0, 4
    movd      [dstq+stride3q ], m0
    RET
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%endif
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cglobal vp9_ipred_h_8x8, 3, 5, %1, dst, stride, l, stride3, cnt
%if cpuflag(ssse3)
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    mova                    m2, [pb_8x1_8x0]
    mova                    m3, [pb_8x3_8x2]
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%endif
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    lea               stride3q, [strideq*3]
    mov                   cntq, 1
.loop:
    movd                    m0, [lq+cntq*4]
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%if cpuflag(ssse3)
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    pshufb                  m1, m0, m3
    pshufb                  m0, m2
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%else
    punpcklbw               m0, m0
    punpcklwd               m0, m0
    pshufd                  m1, m0, q2233
    pshufd                  m0, m0, q0011
%endif
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    movq      [dstq+strideq*0], m1
    movhps    [dstq+strideq*1], m1
    movq      [dstq+strideq*2], m0
    movhps    [dstq+stride3q ], m0
    lea                   dstq, [dstq+strideq*4]
    dec                   cntq
    jge .loop
    RET

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cglobal vp9_ipred_h_16x16, 3, 5, %2, dst, stride, l, stride3, cnt
%if cpuflag(ssse3)
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    mova                    m5, [pb_1]
    mova                    m6, [pb_2]
    mova                    m7, [pb_3]
    pxor                    m4, m4
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%endif
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    lea               stride3q, [strideq*3]
    mov                   cntq, 3
.loop:
    movd                    m3, [lq+cntq*4]
572
%if cpuflag(ssse3)
573 574
    pshufb                  m0, m3, m7
    pshufb                  m1, m3, m6
575 576 577 578 579 580
%else
    punpcklbw               m3, m3
    punpcklwd               m3, m3
    pshufd                  m0, m3, q3333
    pshufd                  m1, m3, q2222
%endif
581 582
    mova      [dstq+strideq*0], m0
    mova      [dstq+strideq*1], m1
583
%if cpuflag(ssse3)
584 585
    pshufb                  m2, m3, m5
    pshufb                  m3, m4
586 587 588 589
%else
    pshufd                  m2, m3, q1111
    pshufd                  m3, m3, q0000
%endif
590 591 592 593 594 595 596
    mova      [dstq+strideq*2], m2
    mova      [dstq+stride3q ], m3
    lea                   dstq, [dstq+strideq*4]
    dec                   cntq
    jge .loop
    RET

597 598
cglobal vp9_ipred_h_32x32, 3, 5, %2, dst, stride, l, stride3, cnt
%if cpuflag(ssse3)
599 600 601 602
    mova                    m5, [pb_1]
    mova                    m6, [pb_2]
    mova                    m7, [pb_3]
    pxor                    m4, m4
603
%endif
604 605 606 607
    lea               stride3q, [strideq*3]
    mov                   cntq, 7
.loop:
    movd                    m3, [lq+cntq*4]
608
%if cpuflag(ssse3)
609 610
    pshufb                  m0, m3, m7
    pshufb                  m1, m3, m6
611 612 613 614 615 616
%else
    punpcklbw               m3, m3
    punpcklwd               m3, m3
    pshufd                  m0, m3, q3333
    pshufd                  m1, m3, q2222
%endif
617 618 619 620
    mova   [dstq+strideq*0+ 0], m0
    mova   [dstq+strideq*0+16], m0
    mova   [dstq+strideq*1+ 0], m1
    mova   [dstq+strideq*1+16], m1
621
%if cpuflag(ssse3)
622 623
    pshufb                  m2, m3, m5
    pshufb                  m3, m4
624 625 626 627
%else
    pshufd                  m2, m3, q1111
    pshufd                  m3, m3, q0000
%endif
628 629 630 631 632 633 634 635 636 637
    mova   [dstq+strideq*2+ 0], m2
    mova   [dstq+strideq*2+16], m2
    mova   [dstq+stride3q + 0], m3
    mova   [dstq+stride3q +16], m3
    lea                   dstq, [dstq+strideq*4]
    dec                   cntq
    jge .loop
    RET
%endmacro

638 639 640 641 642 643
INIT_XMM sse2
H_XMM_FUNCS 2, 4
INIT_XMM ssse3
H_XMM_FUNCS 4, 8
INIT_XMM avx
H_XMM_FUNCS 4, 8
644

645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670
%if HAVE_AVX2_EXTERNAL
INIT_YMM avx2
cglobal vp9_ipred_h_32x32, 3, 5, 8, dst, stride, l, stride3, cnt
    mova                    m5, [pb_1]
    mova                    m6, [pb_2]
    mova                    m7, [pb_3]
    pxor                    m4, m4
    lea               stride3q, [strideq*3]
    mov                   cntq, 7
.loop:
    movd                   xm3, [lq+cntq*4]
    vinserti128             m3, m3, xm3, 1
    pshufb                  m0, m3, m7
    pshufb                  m1, m3, m6
    mova      [dstq+strideq*0], m0
    mova      [dstq+strideq*1], m1
    pshufb                  m2, m3, m5
    pshufb                  m3, m4
    mova      [dstq+strideq*2], m2
    mova      [dstq+stride3q ], m3
    lea                   dstq, [dstq+strideq*4]
    dec                   cntq
    jge .loop
    RET
%endif

671 672
; tm

673
%macro TM_MMX_FUNCS 0
674 675 676
cglobal vp9_ipred_tm_4x4, 4, 4, 0, dst, stride, l, a
    pxor                    m1, m1
    movd                    m0, [aq]
677 678
    pinsrw                  m2, [aq-1], 0
    punpcklbw               m0, m1
679
    DEFINE_ARGS dst, stride, l, cnt
680
%if cpuflag(ssse3)
681
    mova                    m3, [pw_m256]
682
    mova                    m1, [pw_m255]
683
    pshufb                  m2, m3
684 685 686 687
%else
    punpcklbw               m2, m1
    pshufw                  m2, m2, q0000
%endif
688 689 690 691
    psubw                   m0, m2
    mov                   cntq, 1
.loop:
    pinsrw                  m2, [lq+cntq*2], 0
692 693
%if cpuflag(ssse3)
    pshufb                  m4, m2, m1
694
    pshufb                  m2, m3
695 696 697 698 699 700
%else
    punpcklbw               m2, m1
    pshufw                  m4, m2, q1111
    pshufw                  m2, m2, q0000
%endif
    paddw                   m4, m0
701
    paddw                   m2, m0
702
    packuswb                m4, m4
703
    packuswb                m2, m2
704
    movd      [dstq+strideq*0], m4
705 706 707 708 709
    movd      [dstq+strideq*1], m2
    lea                   dstq, [dstq+strideq*2]
    dec                   cntq
    jge .loop
    RET
710 711 712 713 714 715
%endmacro

INIT_MMX mmxext
TM_MMX_FUNCS
INIT_MMX ssse3
TM_MMX_FUNCS
716

717
%macro TM_XMM_FUNCS 0
718 719 720
cglobal vp9_ipred_tm_8x8, 4, 4, 5, dst, stride, l, a
    pxor                    m1, m1
    movh                    m0, [aq]
721 722
    pinsrw                  m2, [aq-1], 0
    punpcklbw               m0, m1
723
    DEFINE_ARGS dst, stride, l, cnt
724
%if cpuflag(ssse3)
725
    mova                    m3, [pw_m256]
726
    mova                    m1, [pw_m255]
727
    pshufb                  m2, m3
728 729 730 731 732
%else
    punpcklbw               m2, m1
    punpcklwd               m2, m2
    pshufd                  m2, m2, q0000
%endif
733 734 735 736
    psubw                   m0, m2
    mov                   cntq, 3
.loop:
    pinsrw                  m2, [lq+cntq*2], 0
737 738
%if cpuflag(ssse3)
    pshufb                  m4, m2, m1
739
    pshufb                  m2, m3
740 741 742 743 744 745 746
%else
    punpcklbw               m2, m1
    punpcklwd               m2, m2
    pshufd                  m4, m2, q1111
    pshufd                  m2, m2, q0000
%endif
    paddw                   m4, m0
747
    paddw                   m2, m0
748 749 750
    packuswb                m4, m2
    movh      [dstq+strideq*0], m4
    movhps    [dstq+strideq*1], m4
751 752 753 754 755 756 757 758
    lea                   dstq, [dstq+strideq*2]
    dec                   cntq
    jge .loop
    RET

cglobal vp9_ipred_tm_16x16, 4, 4, 8, dst, stride, l, a
    pxor                    m3, m3
    mova                    m0, [aq]
759 760 761
    pinsrw                  m2, [aq-1], 0
    punpckhbw               m1, m0, m3
    punpcklbw               m0, m3
762
    DEFINE_ARGS dst, stride, l, cnt
763
%if cpuflag(ssse3)
764
    mova                    m4, [pw_m256]
765
    mova                    m3, [pw_m255]
766
    pshufb                  m2, m4
767 768 769 770 771
%else
    punpcklbw               m2, m3
    punpcklwd               m2, m2
    pshufd                  m2, m2, q0000
%endif
772 773 774 775 776
    psubw                   m1, m2
    psubw                   m0, m2
    mov                   cntq, 7
.loop:
    pinsrw                  m7, [lq+cntq*2], 0
777 778
%if cpuflag(ssse3)
    pshufb                  m5, m7, m3
779
    pshufb                  m7, m4
780 781 782 783 784 785 786 787
%else
    punpcklbw               m7, m3
    punpcklwd               m7, m7
    pshufd                  m5, m7, q1111
    pshufd                  m7, m7, q0000
%endif
    paddw                   m2, m5, m0
    paddw                   m5, m1
788 789
    paddw                   m6, m7, m0
    paddw                   m7, m1
790
    packuswb                m2, m5
791 792 793 794 795 796 797 798 799
    packuswb                m6, m7
    mova      [dstq+strideq*0], m2
    mova      [dstq+strideq*1], m6
    lea                   dstq, [dstq+strideq*2]
    dec                   cntq
    jge .loop
    RET

%if ARCH_X86_64
800 801 802 803 804
%define mem 0
%else
%define mem 64
%endif
cglobal vp9_ipred_tm_32x32, 4, 4, 14, mem, dst, stride, l, a
805 806 807 808 809
    pxor                    m5, m5
    pinsrw                  m4, [aq-1], 0
    mova                    m0, [aq]
    mova                    m2, [aq+16]
    DEFINE_ARGS dst, stride, l, cnt
810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825
%if cpuflag(ssse3)
%if ARCH_X86_64
    mova                   m12, [pw_m256]
    mova                   m13, [pw_m255]
%define pw_m256_reg m12
%define pw_m255_reg m13
%else
%define pw_m256_reg [pw_m256]
%define pw_m255_reg [pw_m255]
%endif
    pshufb                  m4, pw_m256_reg
%else
    punpcklbw               m4, m5
    punpcklwd               m4, m4
    pshufd                  m4, m4, q0000
%endif
826 827 828 829 830 831 832 833
    punpckhbw               m1, m0,  m5
    punpckhbw               m3, m2,  m5
    punpcklbw               m0, m5
    punpcklbw               m2, m5
    psubw                   m1, m4
    psubw                   m0, m4
    psubw                   m3, m4
    psubw                   m2, m4
834 835 836 837 838 839 840 841 842 843 844
%if ARCH_X86_64
    SWAP                     0, 8
    SWAP                     1, 9
    SWAP                     2, 10
    SWAP                     3, 11
%else
    mova            [rsp+0*16], m0
    mova            [rsp+1*16], m1
    mova            [rsp+2*16], m2
    mova            [rsp+3*16], m3
%endif
845 846
    mov                   cntq, 15
.loop:
847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876
    pinsrw                  m3, [lq+cntq*2], 0
%if cpuflag(ssse3)
    pshufb                  m7, m3, pw_m255_reg
    pshufb                  m3, pw_m256_reg
%else
    pxor                    m7, m7
    punpcklbw               m3, m7
    punpcklwd               m3, m3
    pshufd                  m7, m3, q1111
    pshufd                  m3, m3, q0000
%endif
%if ARCH_X86_64
    paddw                   m4, m7, m8
    paddw                   m5, m7, m9
    paddw                   m6, m7, m10
    paddw                   m7, m11
    paddw                   m0, m3, m8
    paddw                   m1, m3, m9
    paddw                   m2, m3, m10
    paddw                   m3, m11
%else
    paddw                   m4, m7, [rsp+0*16]
    paddw                   m5, m7, [rsp+1*16]
    paddw                   m6, m7, [rsp+2*16]
    paddw                   m7, [rsp+3*16]
    paddw                   m0, m3, [rsp+0*16]
    paddw                   m1, m3, [rsp+1*16]
    paddw                   m2, m3, [rsp+2*16]
    paddw                   m3, [rsp+3*16]
%endif
877 878
    packuswb                m4, m5
    packuswb                m6, m7
879 880
    packuswb                m0, m1
    packuswb                m2, m3
881 882
    mova   [dstq+strideq*0+ 0], m4
    mova   [dstq+strideq*0+16], m6
883 884
    mova   [dstq+strideq*1+ 0], m0
    mova   [dstq+strideq*1+16], m2
885 886 887 888
    lea                   dstq, [dstq+strideq*2]
    dec                   cntq
    jge .loop
    RET
889 890 891
%undef pw_m256_reg
%undef pw_m255_reg
%undef mem
892 893
%endmacro

894 895 896 897 898 899
INIT_XMM sse2
TM_XMM_FUNCS
INIT_XMM ssse3
TM_XMM_FUNCS
INIT_XMM avx
TM_XMM_FUNCS
900

901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935
%if HAVE_AVX2_EXTERNAL
INIT_YMM avx2
cglobal vp9_ipred_tm_32x32, 4, 4, 8, dst, stride, l, a
    pxor                    m3, m3
    pinsrw                 xm2, [aq-1], 0
    vinserti128             m2, m2, xm2, 1
    mova                    m0, [aq]
    DEFINE_ARGS dst, stride, l, cnt
    mova                    m4, [pw_m256]
    mova                    m5, [pw_m255]
    pshufb                  m2, m4
    punpckhbw               m1, m0, m3
    punpcklbw               m0, m3
    psubw                   m1, m2
    psubw                   m0, m2
    mov                   cntq, 15
.loop:
    pinsrw                 xm7, [lq+cntq*2], 0
    vinserti128             m7, m7, xm7, 1
    pshufb                  m3, m7, m5
    pshufb                  m7, m4
    paddw                   m2, m3, m0
    paddw                   m3, m1
    paddw                   m6, m7, m0
    paddw                   m7, m1
    packuswb                m2, m3
    packuswb                m6, m7
    mova      [dstq+strideq*0], m2
    mova      [dstq+strideq*1], m6
    lea                   dstq, [dstq+strideq*2]
    dec                   cntq
    jge .loop
    RET
%endif

936 937 938 939 940 941 942 943 944 945
; dl

%macro LOWPASS 4 ; left [dst], center, right, tmp
    pxor                   m%4, m%1, m%3
    pand                   m%4, [pb_1]
    pavgb                  m%1, m%3
    psubusb                m%1, m%4
    pavgb                  m%1, m%2
%endmacro

946
%macro DL_MMX_FUNCS 0
947 948
cglobal vp9_ipred_dl_4x4, 4, 4, 0, dst, stride, l, a
    movq                    m1, [aq]
949
%if cpuflag(ssse3)
950 951
    pshufb                  m0, m1, [pb_0to5_2x7]
    pshufb                  m2, m1, [pb_2to6_3x7]
952 953 954 955 956 957 958 959
%else
    punpckhbw               m3, m1, m1              ; 44556677
    pand                    m0, m1, [pb_6xm1_2x0]   ; 012345__
    pand                    m3, [pb_6x0_2xm1]       ; ______77
    psrlq                   m2, m1, 16              ; 234567__
    por                     m0, m3                  ; 01234577
    por                     m2, m3                  ; 23456777
%endif
960 961 962 963 964 965 966 967 968 969 970 971
    psrlq                   m1, 8
    LOWPASS                  0, 1, 2, 3

    pshufw                  m1, m0, q3321
    movd      [dstq+strideq*0], m0
    movd      [dstq+strideq*2], m1
    psrlq                   m0, 8
    psrlq                   m1, 8
    add                   dstq, strideq
    movd      [dstq+strideq*0], m0
    movd      [dstq+strideq*2], m1
    RET
972 973 974 975 976 977
%endmacro

INIT_MMX mmxext
DL_MMX_FUNCS
INIT_MMX ssse3
DL_MMX_FUNCS
978

979
%macro DL_XMM_FUNCS 0
980 981 982
cglobal vp9_ipred_dl_8x8, 4, 4, 4, dst, stride, stride5, a
    movq                    m0, [aq]
    lea               stride5q, [strideq*5]
983
%if cpuflag(ssse3)
984
    pshufb                  m1, m0, [pb_1to6_10x7]
985 986 987 988 989 990 991 992 993
%else
    punpcklbw               m1, m0, m0              ; 0011223344556677
    punpckhwd               m1, m1                  ; 4x4,4x5,4x6,4x7
%endif
    shufps                  m0, m1, q3310
%if notcpuflag(ssse3)
    psrldq                  m1, m0, 1
    shufps                  m1, m0, q3210
%endif
994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016
    psrldq                  m2, m1, 1
    LOWPASS                  0, 1, 2, 3

    pshufd                  m1, m0, q3321
    movq      [dstq+strideq*0], m0
    movq      [dstq+strideq*4], m1
    psrldq                  m0, 1
    psrldq                  m1, 1
    movq      [dstq+strideq*1], m0
    movq      [dstq+stride5q ], m1
    lea                   dstq, [dstq+strideq*2]
    psrldq                  m0, 1
    psrldq                  m1, 1
    movq      [dstq+strideq*0], m0
    movq      [dstq+strideq*4], m1
    psrldq                  m0, 1
    psrldq                  m1, 1
    movq      [dstq+strideq*1], m0
    movq      [dstq+stride5q ], m1
    RET

cglobal vp9_ipred_dl_16x16, 4, 4, 6, dst, stride, l, a
    mova                    m0, [aq]
1017 1018
%if cpuflag(ssse3)
    mova                    m5, [pb_1toE_2xF]
1019 1020 1021
    pshufb                  m1, m0, m5
    pshufb                  m2, m1, m5
    pshufb                  m4, m0, [pb_15]
1022 1023 1024 1025 1026 1027 1028 1029
%else
    pand                    m5, m0, [pb_15x0_1xm1]      ; _______________F
    psrldq                  m1, m0, 1                   ; 123456789ABCDEF_
    por                     m1, m5                      ; 123456789ABCDEFF
    psrldq                  m2, m1, 1                   ; 23456789ABCDEFF_
    por                     m2, m5                      ; 23456789ABCDEFFF
    pshufhw                 m4, m1, q3333               ; xxxxxxxxFFFFFFFF
%endif
1030 1031
    LOWPASS                  0, 1, 2, 3
    DEFINE_ARGS dst, stride, cnt, stride9
1032
    lea               stride9q, [strideq+strideq*8]
1033 1034 1035 1036 1037
    mov                   cntd, 4

.loop:
    movhlps                 m4, m0
    mova      [dstq+strideq*0], m0
1038
%if cpuflag(ssse3)
1039
    pshufb                  m0, m5
1040 1041 1042 1043
%else
    psrldq                  m0, 1
    por                     m0, m5
%endif
1044 1045 1046
    mova      [dstq+strideq*8], m4
    movhlps                 m4, m0
    mova      [dstq+strideq*1], m0
1047
%if cpuflag(ssse3)
1048
    pshufb                  m0, m5
1049 1050 1051 1052
%else
    psrldq                  m0, 1
    por                     m0, m5
%endif
1053 1054 1055 1056 1057 1058
    mova      [dstq+stride9q ], m4
    lea                   dstq, [dstq+strideq*2]
    dec                   cntd
    jg .loop
    RET

1059
cglobal vp9_ipred_dl_32x32, 4, 5, 8, dst, stride, cnt, a, dst16
1060 1061
    mova                    m0, [aq]
    mova                    m1, [aq+16]
1062 1063
    PALIGNR                 m2, m1, m0, 1, m4
    PALIGNR                 m3, m1, m0, 2, m4
1064
    LOWPASS                  0, 2, 3, 4
1065 1066
%if cpuflag(ssse3)
    mova                    m5, [pb_1toE_2xF]
1067 1068 1069 1070
    pshufb                  m2, m1, m5
    pshufb                  m3, m2, m5
    pshufb                  m6, m1, [pb_15]
    mova                    m7, m6
1071 1072 1073 1074 1075 1076 1077 1078 1079 1080
%else
    pand                    m5, m1, [pb_15x0_1xm1]      ; _______________F
    psrldq                  m2, m1, 1                   ; 123456789ABCDEF_
    por                     m2, m5                      ; 123456789ABCDEFF
    psrldq                  m3, m2, 1                   ; 23456789ABCDEFF_
    por                     m3, m5                      ; 23456789ABCDEFFF
    pshufhw                 m7, m2, q3333               ; xxxxxxxxFFFFFFFF
    pshufd                  m6, m7, q3333
%endif
    LOWPASS                  1, 2, 3, 4
1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097
    lea                 dst16q, [dstq  +strideq*8]
    mov                   cntd, 8
    lea                 dst16q, [dst16q+strideq*8]
.loop:
    movhlps                 m7, m1
    mova [dstq  +strideq*0+ 0], m0
    mova [dstq  +strideq*0+16], m1
    movhps [dstq+strideq*8+ 0], m0
    movq [dstq  +strideq*8+ 8], m1
    mova [dstq  +strideq*8+16], m7
    mova [dst16q+strideq*0+ 0], m1
    mova [dst16q+strideq*0+16], m6
    mova [dst16q+strideq*8+ 0], m7
    mova [dst16q+strideq*8+16], m6
%if cpuflag(avx)
    vpalignr                m0, m1, m0, 1
    pshufb                  m1, m5
1098
%elif cpuflag(ssse3)
1099 1100 1101
    palignr                 m2, m1, m0, 1
    pshufb                  m1, m5
    mova                    m0, m2
1102 1103 1104 1105 1106 1107 1108
%else
    mova                    m4, m1
    psrldq                  m0, 1
    pslldq                  m4, 15
    psrldq                  m1, 1
    por                     m0, m4
    por                     m1, m5
1109 1110 1111 1112 1113 1114 1115 1116
%endif
    add                   dstq, strideq
    add                 dst16q, strideq
    dec                   cntd
    jg .loop
    RET
%endmacro

1117 1118 1119 1120 1121 1122
INIT_XMM sse2
DL_XMM_FUNCS
INIT_XMM ssse3
DL_XMM_FUNCS
INIT_XMM avx
DL_XMM_FUNCS
1123 1124 1125

; dr

1126
%macro DR_MMX_FUNCS 0
1127 1128 1129 1130 1131 1132
cglobal vp9_ipred_dr_4x4, 4, 4, 0, dst, stride, l, a
    movd                    m0, [lq]
    punpckldq               m0, [aq-1]
    movd                    m1, [aq+3]
    DEFINE_ARGS dst, stride, stride3
    lea               stride3q, [strideq*3]
1133
    PALIGNR                 m1, m0, 1, m3
1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144
    psrlq                   m2, m1, 8
    LOWPASS                  0, 1, 2, 3

    movd      [dstq+stride3q ], m0
    psrlq                   m0, 8
    movd      [dstq+strideq*2], m0
    psrlq                   m0, 8
    movd      [dstq+strideq*1], m0
    psrlq                   m0, 8
    movd      [dstq+strideq*0], m0
    RET
1145 1146 1147 1148 1149 1150
%endmacro

INIT_MMX mmxext
DR_MMX_FUNCS
INIT_MMX ssse3
DR_MMX_FUNCS
1151

1152
%macro DR_XMM_FUNCS 0
1153 1154 1155 1156 1157 1158 1159
cglobal vp9_ipred_dr_8x8, 4, 4, 4, dst, stride, l, a
    movq                    m1, [lq]
    movhps                  m1, [aq-1]
    movd                    m2, [aq+7]
    DEFINE_ARGS dst, stride, stride3
    lea               stride3q, [strideq*3]
    pslldq                  m0, m1, 1
1160
    PALIGNR                 m2, m1, 1, m3
1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188
    LOWPASS                  0, 1, 2, 3

    movhps    [dstq+strideq*0], m0
    pslldq                  m0, 1
    movhps    [dstq+strideq*1], m0
    pslldq                  m0, 1
    movhps    [dstq+strideq*2], m0
    pslldq                  m0, 1
    movhps    [dstq+stride3q ], m0
    pslldq                  m0, 1
    lea                   dstq, [dstq+strideq*4]
    movhps    [dstq+strideq*0], m0
    pslldq                  m0, 1
    movhps    [dstq+strideq*1], m0
    pslldq                  m0, 1
    movhps    [dstq+strideq*2], m0
    pslldq                  m0, 1
    movhps    [dstq+stride3q ], m0
    RET

cglobal vp9_ipred_dr_16x16, 4, 4, 6, dst, stride, l, a
    mova                    m1, [lq]
    movu                    m2, [aq-1]
    movd                    m4, [aq+15]
    DEFINE_ARGS dst, stride, stride9, cnt
    lea               stride9q, [strideq *3]
    mov                   cntd, 4
    lea               stride9q, [stride9q*3]
1189 1190
    PALIGNR                 m4, m2, 1, m5
    PALIGNR                 m3, m2, m1, 15, m5
1191 1192
    LOWPASS                  3,  2, 4, 5
    pslldq                  m0, m1, 1
1193
    PALIGNR                 m2, m1, 1, m4
1194 1195 1196 1197 1198 1199
    LOWPASS                  0,  1, 2, 4

.loop:
    mova    [dstq+strideq*0  ], m3
    movhps  [dstq+strideq*8+0], m0
    movq    [dstq+strideq*8+8], m3
1200
    PALIGNR                 m3, m0, 15, m1
1201 1202 1203 1204
    pslldq                  m0, 1
    mova    [dstq+strideq*1  ], m3
    movhps  [dstq+stride9q +0], m0
    movq    [dstq+stride9q +8], m3
1205
    PALIGNR                 m3, m0, 15, m1
1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219
    pslldq                  m0, 1
    lea                   dstq, [dstq+strideq*2]
    dec                   cntd
    jg .loop
    RET

cglobal vp9_ipred_dr_32x32, 4, 4, 8, dst, stride, l, a
    mova                    m1, [lq]
    mova                    m2, [lq+16]
    movu                    m3, [aq-1]
    movu                    m4, [aq+15]
    movd                    m5, [aq+31]
    DEFINE_ARGS dst, stride, stride8, cnt
    lea               stride8q, [strideq*8]
1220 1221
    PALIGNR                 m5, m4, 1, m7
    PALIGNR                 m6, m4, m3, 15, m7
1222
    LOWPASS                  5,  4,  6,  7
1223 1224
    PALIGNR                 m4, m3, 1, m7
    PALIGNR                 m6, m3, m2, 15, m7
1225
    LOWPASS                  4,  3,  6,  7
1226 1227
    PALIGNR                 m3, m2, 1, m7
    PALIGNR                 m6, m2, m1, 15, m7
1228
    LOWPASS                  3,  2,  6,  7
1229
    PALIGNR                 m2, m1, 1, m6
1230 1231 1232 1233 1234 1235 1236 1237 1238 1239
    pslldq                  m0, m1, 1
    LOWPASS                  2,  1,  0,  6
    mov                   cntd, 16

    ; out=m2/m3/m4/m5
.loop:
    mova  [dstq+stride8q*0+ 0], m4
    mova  [dstq+stride8q*0+16], m5
    mova  [dstq+stride8q*2+ 0], m3
    mova  [dstq+stride8q*2+16], m4
1240 1241 1242
    PALIGNR                 m5, m4, 15, m6
    PALIGNR                 m4, m3, 15, m6
    PALIGNR                 m3, m2, 15, m6
1243 1244 1245 1246 1247 1248 1249
    pslldq                  m2, 1
    add                   dstq, strideq
    dec                   cntd
    jg .loop
    RET
%endmacro

1250 1251 1252 1253 1254 1255
INIT_XMM sse2
DR_XMM_FUNCS
INIT_XMM ssse3
DR_XMM_FUNCS
INIT_XMM avx
DR_XMM_FUNCS
1256 1257 1258

; vl

1259
INIT_MMX mmxext
1260 1261 1262 1263 1264 1265
cglobal vp9_ipred_vl_4x4, 4, 4, 0, dst, stride, l, a
    movq                    m0, [aq]
    psrlq                   m1, m0, 8
    psrlq                   m2, m1, 8
    LOWPASS                  2,  1, 0, 3
    pavgb                   m1, m0
1266 1267
    movd      [dstq+strideq*0], m1
    movd      [dstq+strideq*1], m2
1268 1269 1270
    lea                   dstq, [dstq+strideq*2]
    psrlq                   m1, 8
    psrlq                   m2, 8
1271 1272
    movd      [dstq+strideq*0], m1
    movd      [dstq+strideq*1], m2
1273 1274
    RET

1275
%macro VL_XMM_FUNCS 0
1276 1277
cglobal vp9_ipred_vl_8x8, 4, 4, 4, dst, stride, l, a
    movq                    m0, [aq]
1278
%if cpuflag(ssse3)
1279
    pshufb                  m0, [pb_0to6_9x7]
1280 1281 1282 1283 1284
%else
    punpcklbw               m1, m0, m0
    punpckhwd               m1, m1
    shufps                  m0, m1, q3310
%endif
1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312
    DEFINE_ARGS dst, stride, stride3
    lea               stride3q, [strideq*3]
    psrldq                  m1, m0, 1
    psrldq                  m2, m0, 2
    LOWPASS                  2,  1,  0,  3
    pavgb                   m1, m0

    movq      [dstq+strideq*0], m1
    movq      [dstq+strideq*1], m2
    psrldq                  m1, 1
    psrldq                  m2, 1
    movq      [dstq+strideq*2], m1
    movq      [dstq+stride3q ], m2
    lea                   dstq, [dstq+strideq*4]
    psrldq                  m1, 1
    psrldq                  m2, 1
    movq      [dstq+strideq*0], m1
    movq      [dstq+strideq*1], m2
    psrldq                  m1, 1
    psrldq                  m2, 1
    movq      [dstq+strideq*2], m1
    movq      [dstq+stride3q ], m2
    RET

cglobal vp9_ipred_vl_16x16, 4, 4, 5, dst, stride, l, a
    mova                    m0, [aq]
    DEFINE_ARGS dst, stride, stride3, cnt
    lea               stride3q, [strideq*3]
1313 1314
%if cpuflag(ssse3)
    mova                    m4, [pb_1toE_2xF]
1315 1316
    pshufb                  m1, m0, m4
    pshufb                  m2, m1, m4
1317 1318 1319 1320 1321 1322 1323
%else
    pand                    m4, m0, [pb_15x0_1xm1]  ; _______________F
    psrldq                  m1, m0, 1               ; 123456789ABCDEF_
    por                     m1, m4                  ; 123456789ABCDEFF
    psrldq                  m2, m1, 1               ; 23456789ABCDEFF_
    por                     m2, m4                  ; 23456789ABCDEFFF
%endif
1324 1325 1326 1327 1328 1329
    LOWPASS                  2,  1,  0, 3
    pavgb                   m1, m0
    mov                   cntd, 4
.loop:
    mova      [dstq+strideq*0], m1
    mova      [dstq+strideq*1], m2
1330
%if cpuflag(ssse3)
1331 1332
    pshufb                  m1, m4
    pshufb                  m2, m4
1333 1334 1335 1336 1337 1338
%else
    psrldq                  m1, 1
    psrldq                  m2, 1
    por                     m1, m4
    por                     m2, m4
%endif
1339 1340
    mova      [dstq+strideq*2], m1
    mova      [dstq+stride3q ], m2
1341
%if cpuflag(ssse3)
1342 1343
    pshufb                  m1, m4
    pshufb                  m2, m4
1344 1345 1346 1347 1348 1349
%else
    psrldq                  m1, 1
    psrldq                  m2, 1
    por                     m1, m4
    por                     m2, m4
%endif
1350 1351 1352 1353 1354 1355 1356 1357 1358
    lea                   dstq, [dstq+strideq*4]
    dec                   cntd
    jg .loop
    RET

cglobal vp9_ipred_vl_32x32, 4, 4, 7, dst, stride, l, a
    mova                    m0, [aq]
    mova                    m5, [aq+16]
    DEFINE_ARGS dst, stride, dst16, cnt
1359 1360
    PALIGNR                 m2, m5, m0, 1, m4
    PALIGNR                 m3, m5, m0, 2, m4
1361 1362 1363
    lea                 dst16q, [dstq  +strideq*8]
    LOWPASS                  3,  2,  0, 6
    pavgb                   m2, m0
1364 1365
%if cpuflag(ssse3)
    mova                    m4, [pb_1toE_2xF]
1366 1367
    pshufb                  m0, m5, m4
    pshufb                  m1, m0, m4
1368 1369 1370 1371 1372 1373 1374
%else
    pand                    m4, m5, [pb_15x0_1xm1]  ; _______________F
    psrldq                  m0, m5, 1               ; 123456789ABCDEF_
    por                     m0, m4                  ; 123456789ABCDEFF
    psrldq                  m1, m0, 1               ; 23456789ABCDEFF_
    por                     m1, m4                  ; 23456789ABCDEFFF
%endif
1375 1376 1377
    lea                 dst16q, [dst16q+strideq*8]
    LOWPASS                  1,  0,  5, 6
    pavgb                   m0, m5
1378
%if cpuflag(ssse3)
1379
    pshufb                  m5, [pb_15]
1380 1381 1382 1383 1384
%else
    punpckhbw               m5, m4, m4
    pshufhw                 m5, m5, q3333
    punpckhqdq              m5, m5
%endif
1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396
    mov                   cntd, 8

.loop:
%macro %%write 3
    mova    [dstq+stride%1+ 0], %2
    mova    [dstq+stride%1+16], %3
    movhps  [dst16q+stride%1 ], %2
    movu  [dst16q+stride%1+ 8], %3
    movq  [dst16q+stride%1+24], m5
%if cpuflag(avx)
    palignr                 %2, %3, %2, 1
    pshufb                  %3, m4
1397
%elif cpuflag(ssse3)
1398 1399 1400
    palignr                 m6, %3, %2, 1
    pshufb                  %3, m4
    mova                    %2, m6
1401 1402 1403 1404 1405 1406
%else
    pslldq                  m6, %3, 15
    psrldq                  %3, 1
    psrldq                  %2, 1
    por                     %3, m4
    por                     %2, m6
1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418
%endif
%endmacro

    %%write                q*0, m2, m0
    %%write                q*1, m3, m1
    lea                   dstq, [dstq  +strideq*2]
    lea                 dst16q, [dst16q+strideq*2]
    dec                   cntd
    jg .loop
    RET
%endmacro

1419 1420 1421 1422 1423 1424
INIT_XMM sse2
VL_XMM_FUNCS
INIT_XMM ssse3
VL_XMM_FUNCS
INIT_XMM avx
VL_XMM_FUNCS
1425 1426 1427

; vr

1428
%macro VR_MMX_FUNCS 0
1429 1430 1431 1432 1433 1434 1435
cglobal vp9_ipred_vr_4x4, 4, 4, 0, dst, stride, l, a
    movq                    m1, [aq-1]
    punpckldq               m2, [lq]
    movd                    m0, [aq]
    DEFINE_ARGS dst, stride, stride3
    lea               stride3q, [strideq*3]
    pavgb                   m0, m1
1436
    PALIGNR                 m1, m2, 5, m3
1437 1438 1439 1440 1441 1442 1443 1444 1445
    psrlq                   m2, m1, 8
    psllq                   m3, m1, 8
    LOWPASS                  2,  1, 3, 4

    ; ABCD <- for the following predictor:
    ; EFGH
    ; IABC  | m0 contains ABCDxxxx
    ; JEFG  | m2 contains xJIEFGHx

1446
%if cpuflag(ssse3)
1447 1448 1449 1450 1451 1452 1453 1454
    punpckldq               m0, m2
    pshufb                  m2, [pb_13456_3xm1]
    movd      [dstq+strideq*0], m0
    pshufb                  m0, [pb_6012_4xm1]
    movd      [dstq+stride3q ], m2
    psrlq                   m2, 8
    movd      [dstq+strideq*2], m0
    movd      [dstq+strideq*1], m2
1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465
%else
    psllq                   m1, m2, 40
    psrlq                   m2, 24
    movd      [dstq+strideq*0], m0
    movd      [dstq+strideq*1], m2
    PALIGNR                 m0, m1, 7, m3
    psllq                   m1, 8
    PALIGNR                 m2, m1, 7, m3
    movd      [dstq+strideq*2], m0
    movd      [dstq+stride3q ], m2
%endif
1466
    RET
1467 1468 1469 1470 1471 1472
%endmacro

INIT_MMX mmxext
VR_MMX_FUNCS
INIT_MMX ssse3
VR_MMX_FUNCS
1473

1474
%macro VR_XMM_FUNCS 1 ; n_xmm_regs for 16x16
1475 1476 1477 1478 1479 1480 1481
cglobal vp9_ipred_vr_8x8, 4, 4, 5, dst, stride, l, a
    movu                    m1, [aq-1]
    movhps                  m2, [lq]
    movq                    m0, [aq]
    DEFINE_ARGS dst, stride, stride3
    lea               stride3q, [strideq*3]
    pavgb                   m0, m1
1482
    PALIGNR                 m1, m2, 9, m3
1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495
    pslldq                  m2, m1, 1
    pslldq                  m3, m1, 2
    LOWPASS                  1,  2, 3, 4

    ; ABCDEFGH <- for the following predictor:
    ; IJKLMNOP
    ; QABCDEFG  | m0 contains ABCDEFGHxxxxxxxx
    ; RIJKLMNO  | m1 contains xxVUTSRQIJKLMNOP
    ; SQABCDEF
    ; TRIJKLMN
    ; USQABCDE
    ; VTRIJKLM

1496
%if cpuflag(ssse3)
1497
    punpcklqdq              m0, m1 ; ABCDEFGHxxVUTSRQ
1498
%endif
1499 1500
    movq      [dstq+strideq*0], m0
    movhps    [dstq+strideq*1], m1
1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513
%if cpuflag(ssse3)
    pshufb                  m0, [pb_6xm1_BDF_0to6]  ; xxxxxxUSQABCDEFG
    pshufb                  m1, [pb_6xm1_246_8toE]  ; xxxxxxVTRIJKLMNO
%else
    psrlw                   m2, m1, 8               ; x_U_S_Q_xxxxxxxx
    pand                    m3, m1, [pw_255]        ; x_V_T_R_xxxxxxxx
    packuswb                m3, m2                  ; xVTRxxxxxUSQxxxx
    pslldq                  m3, 4                   ; xxxxxVTRxxxxxUSQ
    PALIGNR                 m0, m3, 7, m4           ; xxxxxxUSQABCDEFG
    psrldq                  m1, 8
    pslldq                  m3, 8
    PALIGNR                 m1, m3, 7, m4           ; xxxxxxVTRIJKLMNO
%endif
1514 1515 1516
    movhps    [dstq+strideq*2], m0
    movhps    [dstq+stride3q ], m1
    lea                   dstq, [dstq+strideq*4]
1517
    pslldq                  m0, 1
1518 1519 1520
    pslldq                  m1, 1
    movhps    [dstq+strideq*0], m0
    movhps    [dstq+strideq*1], m1
1521
    pslldq                  m0, 1
1522 1523 1524 1525 1526
    pslldq                  m1, 1
    movhps    [dstq+strideq*2], m0
    movhps    [dstq+stride3q ], m1
    RET

1527
cglobal vp9_ipred_vr_16x16, 4, 4, %1, dst, stride, l, a
1528 1529 1530 1531 1532
    mova                    m0, [aq]
    movu                    m1, [aq-1]
    mova                    m2, [lq]
    DEFINE_ARGS dst, stride, stride3, cnt
    lea               stride3q, [strideq*3]
1533
    PALIGNR                 m3, m1, m2, 15, m6
1534 1535
    LOWPASS                  3,  1,  0,  4
    pavgb                   m0, m1
1536
    PALIGNR                 m1, m2,  1, m6
1537 1538
    pslldq                  m4, m2,  1
    LOWPASS                  1,  2,  4,  5
1539
%if cpuflag(ssse3)
1540
    pshufb                  m1, [pb_02468ACE_13579BDF]
1541 1542 1543 1544 1545
%else
    psrlw                   m5, m1, 8
    pand                    m1, [pw_255]
    packuswb                m1, m5
%endif
1546 1547 1548 1549 1550 1551
    mov                   cntd, 4

.loop:
    movlhps                 m2, m1
    mova      [dstq+strideq*0], m0
    mova      [dstq+strideq*1], m3
1552 1553
    PALIGNR                 m4, m0, m1, 15, m6
    PALIGNR                 m5, m3, m2, 15, m6
1554 1555 1556
    mova      [dstq+strideq*2], m4
    mova      [dstq+stride3q ], m5
    lea                   dstq, [dstq+strideq*4]
1557 1558
    PALIGNR                 m0, m1, 14, m6
    PALIGNR                 m3, m2, 14, m6
1559 1560 1561 1562 1563 1564 1565 1566 1567
    pslldq                  m1, 2
    dec                   cntd
    jg .loop
    RET

cglobal vp9_ipred_vr_32x32, 4, 4, 9, dst, stride, l, a
    mova                    m0, [aq]
    mova                    m2, [aq+16]
    movu                    m1, [aq-1]
1568 1569
    PALIGNR                 m3, m2, m0, 15, m6
    PALIGNR                 m4, m2, m0, 14, m6
1570 1571 1572
    LOWPASS                  4,  3,  2,  5
    pavgb                   m3, m2
    mova                    m2, [lq+16]
1573
    PALIGNR                 m5, m1, m2, 15, m6
1574 1575 1576
    LOWPASS                  5,  1,  0,  6
    pavgb                   m0, m1
    mova                    m6, [lq]
1577 1578 1579 1580 1581 1582 1583 1584 1585
%if ARCH_X86_64
    SWAP                     0, 8
%else
    mova                [dstq], m0
%endif
    PALIGNR                 m1, m2,  1, m0
    PALIGNR                 m7, m2, m6, 15, m0
    LOWPASS                  1,  2,  7,  0
    PALIGNR                 m2, m6,  1, m0
1586
    pslldq                  m7, m6,  1
1587 1588
    LOWPASS                  2,  6,  7,  0
%if cpuflag(ssse3)
1589 1590
    pshufb                  m1, [pb_02468ACE_13579BDF]
    pshufb                  m2, [pb_02468ACE_13579BDF]
1591 1592 1593 1594 1595 1596 1597 1598
%else
    psrlw                   m0, m1, 8
    psrlw                   m6, m2, 8
    pand                    m1, [pw_255]
    pand                    m2, [pw_255]
    packuswb                m1, m0
    packuswb                m2, m6
%endif
1599 1600 1601 1602
    DEFINE_ARGS dst, stride, dst16, cnt
    lea                 dst16q, [dstq  +strideq*8]
    lea                 dst16q, [dst16q+strideq*8]
    SBUTTERFLY             qdq,  2,  1,  6
1603 1604 1605 1606 1607
%if ARCH_X86_64
    SWAP                     0, 8
%else
    mova                    m0, [dstq]
%endif
1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618
    mov                   cntd, 8

.loop:
    ; even lines (0, 2, 4, ...): m1 | m0, m3
    ;  odd lines (1, 3, 5, ...): m2 | m5, m4
%macro %%write 4
    mova    [dstq+stride%1+ 0], %3
    mova    [dstq+stride%1+16], %4
    movhps  [dst16q+stride%1 ], %2
    movu  [dst16q+stride%1+ 8], %3
    movq  [dst16q+stride%1+24], %4
1619 1620
    PALIGNR                 %4, %3, 15, m6
    PALIGNR                 %3, %2, 15, m6
1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632
    pslldq                  %2,  1
%endmacro

    %%write                q*0, m1, m0, m3
    %%write                q*1, m2, m5, m4
    lea                   dstq, [dstq  +strideq*2]
    lea                 dst16q, [dst16q+strideq*2]
    dec                   cntd
    jg .loop
    RET
%endmacro

1633 1634 1635 1636 1637 1638
INIT_XMM sse2
VR_XMM_FUNCS 7
INIT_XMM ssse3
VR_XMM_FUNCS 6
INIT_XMM avx
VR_XMM_FUNCS 6
1639 1640 1641

; hd

1642
INIT_MMX mmxext
1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671
cglobal vp9_ipred_hd_4x4, 4, 4, 0, dst, stride, l, a
    movd                    m0, [lq]
    punpckldq               m0, [aq-1]
    DEFINE_ARGS dst, stride, stride3
    lea               stride3q, [strideq*3]
    psrlq                   m1, m0, 8
    psrlq                   m2, m1, 8
    LOWPASS                  2,  1, 0,  3
    pavgb                   m1, m0

    ; DHIJ <- for the following predictor:
    ; CGDH
    ; BFCG  | m1 contains ABCDxxxx
    ; AEBF  | m2 contains EFGHIJxx

    punpcklbw               m1, m2
    punpckhdq               m0, m1, m2

    ; m1 contains AEBFCGDH
    ; m0 contains CGDHIJxx

    movd      [dstq+stride3q ], m1
    movd      [dstq+strideq*1], m0
    psrlq                   m1, 16
    psrlq                   m0, 16
    movd      [dstq+strideq*2], m1
    movd      [dstq+strideq*0], m0
    RET

1672 1673
%macro HD_XMM_FUNCS 0
cglobal vp9_ipred_hd_8x8, 4, 4, 5, dst, stride, l, a
1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700
    movq                    m0, [lq]
    movhps                  m0, [aq-1]
    DEFINE_ARGS dst, stride, stride3, dst4
    lea               stride3q, [strideq*3]
    lea                  dst4q, [dstq+strideq*4]
    psrldq                  m1, m0, 1
    psrldq                  m2, m1, 1
    LOWPASS                  2,  1,  0,  3
    pavgb                   m1, m0

    ; HPQRSTUV <- for the following predictor
    ; GOHPQRST
    ; FNGOHPQR  | m1 contains ABCDEFGHxxxxxxxx
    ; EMFNGOHP  | m2 contains IJKLMNOPQRSTUVxx
    ; DLEMFNGO
    ; CKDLEMFN
    ; BJCKDLEM
    ; AIBJCKDL

    punpcklbw               m1, m2
    movhlps                 m2, m2

    ; m1 contains AIBJCKDLEMFNGOHP
    ; m2 contains QRSTUVxxxxxxxxxx

    movhps   [dstq +stride3q ], m1
    movq     [dst4q+stride3q ], m1
1701
    PALIGNR                 m3, m2, m1, 2, m4
1702 1703
    movhps   [dstq +strideq*2], m3
    movq     [dst4q+strideq*2], m3
1704
    PALIGNR                 m3, m2, m1, 4, m4
1705 1706
    movhps   [dstq +strideq*1], m3
    movq     [dst4q+strideq*1], m3
1707
    PALIGNR                 m2, m1, 6, m4
1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722
    movhps   [dstq +strideq*0], m2
    movq     [dst4q+strideq*0], m2
    RET

cglobal vp9_ipred_hd_16x16, 4, 6, 7, dst, stride, l, a
    mova                    m0, [lq]
    movu                    m3, [aq-1]
    DEFINE_ARGS dst, stride, stride4, dst4, dst8, dst12
    lea               stride4q, [strideq*4]
    lea                  dst4q, [dstq +stride4q]
    lea                  dst8q, [dst4q+stride4q]
    lea                 dst12q, [dst8q+stride4q]
    psrldq                  m4, m3,  1
    psrldq                  m5, m3,  2
    LOWPASS                  5,  4,  3,  6
1723 1724
    PALIGNR                 m1, m3, m0,  1, m6
    PALIGNR                 m2, m3, m0,  2, m6
1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741
    LOWPASS                  2,  1,  0,  6
    pavgb                   m1, m0
    SBUTTERFLY              bw,  1,  2,  6

    ; I PROBABLY INVERTED L0 ad L16 here
    ; m1, m2, m5
.loop:
    sub               stride4q, strideq
    movhps [dstq +stride4q +0], m2
    movq   [dstq +stride4q +8], m5
    mova   [dst4q+stride4q   ], m2
    movhps [dst8q+stride4q +0], m1
    movq   [dst8q+stride4q +8], m2
    mova  [dst12q+stride4q   ], m1
%if cpuflag(avx)
    palignr                 m1, m2, m1, 2
    palignr                 m2, m5, m2, 2
1742
%elif cpuflag(ssse3)
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    palignr                 m3, m2, m1, 2
    palignr                 m0, m5, m2, 2
    mova                    m1, m3
    mova                    m2, m0
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%else
    ; slightly modified version of PALIGNR
    mova                    m6, m2
    mova                    m4, m5
    pslldq                  m6, 14
    pslldq                  m4, 14
    psrldq                  m1, 2
    psrldq                  m2, 2
    por                     m1, m6
    por                     m2, m4
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%endif
    psrldq                  m5, 2
    jg .loop
    RET

cglobal vp9_ipred_hd_32x32, 4, 6, 8, dst, stride, l, a
    mova                    m0, [lq]
    mova                    m1, [lq+16]
    movu                    m2, [aq-1]
    movu                    m3, [aq+15]
    DEFINE_ARGS dst, stride, stride8, dst8, dst16, dst24
    lea               stride8q, [strideq*8]
    lea                  dst8q, [dstq  +stride8q]
    lea                 dst16q, [dst8q +stride8q]
    lea                 dst24q, [dst16q+stride8q]
    psrldq                  m4, m3,  1
    psrldq                  m5, m3,  2
    LOWPASS                  5,  4,  3,  6
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    PALIGNR                 m4, m3, m2,  2, m6
    PALIGNR                 m3, m2,  1, m6
1777
    LOWPASS                  4,  3,  2,  6
1778 1779
    PALIGNR                 m3, m2, m1,  2, m6
    PALIGNR                 m2, m1,  1, m6
1780 1781
    LOWPASS                  3,  2,  1,  6
    pavgb                   m2, m1
1782 1783
    PALIGNR                 m6, m1, m0,  1, m7
    PALIGNR                 m1, m0,  2, m7
1784
    LOWPASS                  1,  6,  0,  7
1785
    pavgb                   m0, m6
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    SBUTTERFLY              bw,  2,  3,  6
    SBUTTERFLY              bw,  0,  1,  6

    ; m0, m1, m2, m3, m4, m5
.loop:
    sub               stride8q, strideq
    mova  [dstq  +stride8q+ 0], m3
    mova  [dstq  +stride8q+16], m4
    mova  [dst8q +stride8q+ 0], m2
    mova  [dst8q +stride8q+16], m3
    mova  [dst16q+stride8q+ 0], m1
    mova  [dst16q+stride8q+16], m2
    mova  [dst24q+stride8q+ 0], m0
    mova  [dst24q+stride8q+16], m1
%if cpuflag(avx)
    palignr                 m0, m1, m0, 2
    palignr                 m1, m2, m1, 2
    palignr                 m2, m3, m2, 2
    palignr                 m3, m4, m3, 2
    palignr                 m4, m5, m4, 2
    psrldq                  m5, 2
1807
%elif cpuflag(ssse3)
1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819
    psrldq                  m6, m5, 2
    palignr                 m5, m4, 2
    palignr                 m4, m3, 2
    palignr                 m3, m2, 2
    palignr                 m2, m1, 2
    palignr                 m1, m0, 2
    mova                    m0, m1
    mova                    m1, m2
    mova                    m2, m3
    mova                    m3, m4
    mova                    m4, m5
    mova                    m5, m6
1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837
%else
    ; sort of a half-integrated version of PALIGNR
    pslldq                  m7, m4, 14
    pslldq                  m6, m5, 14
    psrldq                  m4, 2
    psrldq                  m5, 2
    por                     m4, m6
    pslldq                  m6, m3, 14
    psrldq                  m3, 2
    por                     m3, m7
    pslldq                  m7, m2, 14
    psrldq                  m2, 2
    por                     m2, m6
    pslldq                  m6, m1, 14
    psrldq                  m1, 2
    por                     m1, m7
    psrldq                  m0, 2
    por                     m0, m6
1838 1839 1840 1841 1842
%endif
    jg .loop
    RET
%endmacro

1843 1844 1845 1846 1847 1848
INIT_XMM sse2
HD_XMM_FUNCS
INIT_XMM ssse3
HD_XMM_FUNCS
INIT_XMM avx
HD_XMM_FUNCS
1849

1850
%macro HU_MMX_FUNCS 0
1851 1852
cglobal vp9_ipred_hu_4x4, 3, 3, 0, dst, stride, l
    movd                    m0, [lq]
1853
%if cpuflag(ssse3)
1854
    pshufb                  m0, [pb_0to2_5x3]
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%else
    punpcklbw               m1, m0, m0          ; 00112233
    pshufw                  m1, m1, q3333       ; 33333333
    punpckldq               m0, m1              ; 01233333
%endif
1860 1861 1862 1863 1864 1865 1866
    psrlq                   m1, m0, 8
    psrlq                   m2, m1, 8
    LOWPASS                  2,  1, 0, 3
    pavgb                   m1, m0
    DEFINE_ARGS dst, stride, stride3
    lea               stride3q, [strideq*3]
    SBUTTERFLY              bw,  1, 2, 0
1867
    PALIGNR                 m2, m1, 2, m0
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    movd      [dstq+strideq*0], m1
    movd      [dstq+strideq*1], m2
    punpckhdq               m1, m1
    punpckhdq               m2, m2
    movd      [dstq+strideq*2], m1
    movd      [dstq+stride3q ], m2
    RET
1875
%endmacro
1876

1877 1878 1879 1880 1881 1882
INIT_MMX mmxext
HU_MMX_FUNCS
INIT_MMX ssse3
HU_MMX_FUNCS

%macro HU_XMM_FUNCS 1 ; n_xmm_regs in hu_32x32
1883 1884
cglobal vp9_ipred_hu_8x8, 3, 4, 4, dst, stride, l
    movq                    m0, [lq]
1885
%if cpuflag(ssse3)
1886
    pshufb                  m0, [pb_0to6_9x7]
1887 1888 1889 1890 1891
%else
    punpcklbw               m1, m0, m0          ; 0011223344556677
    punpckhwd               m1, m1              ; 4444555566667777
    shufps                  m0, m1, q3310       ; 0123456777777777
%endif
1892 1893 1894 1895 1896 1897 1898 1899 1900 1901
    psrldq                  m1, m0, 1
    psrldq                  m2, m1, 1
    LOWPASS                  2,  1, 0, 3
    pavgb                   m1, m0
    DEFINE_ARGS dst, stride, stride3, dst4
    lea               stride3q, [strideq*3]
    lea                  dst4q, [dstq+strideq*4]
    SBUTTERFLY              bw,  1, 2, 0
    movq     [dstq +strideq*0], m1
    movhps   [dst4q+strideq*0], m1
1902
    PALIGNR                 m0, m2, m1, 2, m3
1903 1904
    movq     [dstq +strideq*1], m0
    movhps   [dst4q+strideq*1], m0
1905
    PALIGNR                 m0, m2, m1, 4, m3
1906 1907
    movq     [dstq +strideq*2], m0
    movhps   [dst4q+strideq*2], m0
1908
    PALIGNR                 m2, m1, 6, m3
1909 1910 1911 1912 1913 1914
    movq     [dstq +stride3q ], m2
    movhps   [dst4q+stride3q ], m2
    RET

cglobal vp9_ipred_hu_16x16, 3, 4, 5, dst, stride, l
    mova                    m0, [lq]
1915
%if cpuflag(ssse3)
1916 1917 1918
    mova                    m3, [pb_2toE_3xF]
    pshufb                  m1, m0, [pb_1toE_2xF]
    pshufb                  m2, m0, m3
1919 1920 1921 1922 1923 1924 1925 1926
%else
    pand                    m3, m0, [pb_15x0_1xm1]
    psrldq                  m1, m0, 1
    por                     m1, m3
    punpckhbw               m3, m3
    psrldq                  m2, m0, 2
    por                     m2, m3
%endif
1927 1928 1929
    LOWPASS                  2,  1,  0,  4
    pavgb                   m1, m0
    DEFINE_ARGS dst, stride, stride9, cnt
1930
    lea                stride9q, [strideq*8+strideq]
1931 1932 1933 1934 1935 1936
    mov                   cntd,  4
    SBUTTERFLY              bw,  1,  2,  0

.loop:
    mova      [dstq+strideq*0], m1
    mova      [dstq+strideq*8], m2
1937 1938
    PALIGNR                 m0, m2, m1, 2, m4
%if cpuflag(ssse3)
1939
    pshufb                  m2, m3
1940 1941 1942 1943
%else
    psrldq                  m2, 2
    por                     m2, m3
%endif
1944 1945
    mova      [dstq+strideq*1], m0
    mova      [dstq+stride9q ], m2
1946 1947
    PALIGNR                 m1, m2, m0, 2, m4
%if cpuflag(ssse3)
1948
    pshufb                  m2, m3
1949 1950 1951 1952
%else
    psrldq                  m2, 2
    por                     m2, m3
%endif
1953 1954 1955 1956 1957
    lea                   dstq, [dstq+strideq*2]
    dec                   cntd
    jg .loop
    RET

1958
cglobal vp9_ipred_hu_32x32, 3, 7, %1, dst, stride, l
1959 1960
    mova                    m1, [lq]
    mova                    m0, [lq+16]
1961 1962
    PALIGNR                 m2, m0, m1,  1, m5
    PALIGNR                 m3, m0, m1,  2, m5
1963 1964
    LOWPASS                  3,  2,  1,  5
    pavgb                   m2, m1
1965 1966
%if cpuflag(ssse3)
    mova                    m4, [pb_2toE_3xF]
1967
    pshufb                  m5, m0, [pb_1toE_2xF]
1968 1969 1970 1971 1972 1973 1974 1975 1976
    pshufb                  m1, m0, m4
%else
    pand                    m4, m0, [pb_15x0_1xm1]
    psrldq                  m5, m0, 1
    por                     m5, m4
    punpckhbw               m4, m4
    psrldq                  m1, m0, 2
    por                     m1, m4
%endif
1977 1978 1979 1980 1981 1982 1983 1984 1985 1986
    LOWPASS                  1,  5,  0,  6
    pavgb                   m0, m5
    DEFINE_ARGS dst, stride, cnt, stride0, dst8, dst16, dst24
    mov                   cntd,  8
    xor               stride0q, stride0q
    lea                  dst8q, [dstq  +strideq*8]
    lea                 dst16q, [dst8q +strideq*8]
    lea                 dst24q, [dst16q+strideq*8]
    SBUTTERFLY              bw,  0,  1,  5
    SBUTTERFLY              bw,  2,  3,  5
1987
%if cpuflag(ssse3)
1988
    pshufb                  m6, m1, [pb_15]
1989 1990 1991 1992
%else
    pshufhw                 m6, m4, q3333
    punpckhqdq              m6, m6
%endif
1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007

.loop:
    mova  [dstq  +stride0q+ 0], m2
    mova  [dstq  +stride0q+16], m3
    mova  [dst8q +stride0q+ 0], m3
    mova  [dst8q +stride0q+16], m0
    mova  [dst16q+stride0q+ 0], m0
    mova  [dst16q+stride0q+16], m1
    mova  [dst24q+stride0q+ 0], m1
    mova  [dst24q+stride0q+16], m6
%if cpuflag(avx)
    palignr                 m2, m3, m2, 2
    palignr                 m3, m0, m3, 2
    palignr                 m0, m1, m0, 2
    pshufb                  m1, m4
2008
%elif cpuflag(ssse3)
2009 2010 2011 2012 2013 2014 2015 2016
    pshufb                  m5, m1, m4
    palignr                 m1, m0, 2
    palignr                 m0, m3, 2
    palignr                 m3, m2, 2
    mova                    m2, m3
    mova                    m3, m0
    mova                    m0, m1
    mova                    m1, m5
2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029
%else
    ; half-integrated version of PALIGNR
    pslldq                  m5, m1, 14
    pslldq                  m7, m0, 14
    psrldq                  m1, 2
    psrldq                  m0, 2
    por                     m1, m4
    por                     m0, m5
    pslldq                  m5, m3, 14
    psrldq                  m3, 2
    por                     m3, m7
    psrldq                  m2, 2
    por                     m2, m5
2030 2031 2032 2033 2034 2035 2036
%endif
    add               stride0q, strideq
    dec                   cntd
    jg .loop
    RET
%endmacro

2037 2038 2039 2040 2041 2042
INIT_XMM sse2
HU_XMM_FUNCS 8
INIT_XMM ssse3
HU_XMM_FUNCS 7
INIT_XMM avx
HU_XMM_FUNCS 7
2043 2044

; FIXME 127, 128, 129 ?