• pierre.langlois's avatar
    ARM64: [turbofan] Avoid zero-extension after a 32-bit load · f07d2cdd
    pierre.langlois authored
    A load instruction will implicitely clear the top 32 bits when writing to a W
    register. This patch avoids generating a `mov` instruction to zero-extend the
    result in this case.
    
    For example, this occurs in the generated code for dispatching to the next
    bytecode in the interpreter:
    
      kind = BYTECODE_HANDLER
      name = LdaZero
      compiler = turbofan
      Instructions (size = 36)
      0x32e64c60     0  add x19, x19, #0x1 (1)
      0x32e64c64     4  ldrb w0, [x20, x19]
      0x32e64c68     8  mov w0, w0
                        ^^^^^^^^^^
      0x32e64c6c    12  lsl x0, x0, #3
      0x32e64c70    16  ldr x1, [x21, x0]
      0x32e64c74    20  movz x0, #0x0
      0x32e64c78    24  br x1
    
    BUG=
    
    Review-Url: https://codereview.chromium.org/1950013003
    Cr-Commit-Position: refs/heads/master@{#36038}
    f07d2cdd
Name
Last commit
Last update
..
base Loading commit data...
compiler Loading commit data...
heap Loading commit data...
interpreter Loading commit data...
libplatform Loading commit data...
wasm Loading commit data...
DEPS Loading commit data...
atomic-utils-unittest.cc Loading commit data...
cancelable-tasks-unittest.cc Loading commit data...
char-predicates-unittest.cc Loading commit data...
counters-unittest.cc Loading commit data...
locked-queue-unittest.cc Loading commit data...
run-all-unittests.cc Loading commit data...
test-utils.cc Loading commit data...
test-utils.h Loading commit data...
unittests.gyp Loading commit data...
unittests.isolate Loading commit data...
unittests.status Loading commit data...