-
Predrag Rudic authored
Port 0761b55d Original Commit Message: "Extend the code-generator tests to cover AssembleMove and AssembleSwap with Simd128 registers and stack slots, for targets that support them. For this to work however, we need support for passing Simd128 stack parameters in TurboFan which this patch implements for Arm and x86. PPC and S390 both do not support the Simd128 representation and it appears MIPS and MIPS64's implementation of AssembleMove and AssembleSwap do not support it either. As per the design of the tests, the set of values to perform moves on are represented in a FixedArray of Smis (for kTagged) and HeapNumbers (for kFloat32 and kFloat64). They are converted to raw values for the moves to be performed on, to be then converted back into a FixedArray. For the kSimd128 representation, we represent values as a FixedArray of 4 Smis, each representing a lane. They are converted to a raw Simd128 vector using the `I32x4ReplaceLane` and `I32x4ExtractLane` operations. Finally, these tests need Simd128 variables mixed with the CodeStubAssembler which is not a use-case officially supported. And as a result, the `RecordWrite` stub does not guarantee to preserve Simd128 registers. To get around this, we have to be careful to skip write barriers when dealing with Simd128 parameters inside the "teardown" function, and we've had to move all allocations to the "setup" function. Thanks to this, we are able to catch bugs such as this one https://bugs.chromium.org/p/v8/issues/detail?id=6843." Change-Id: If867dedf4a2c72cb75c58effda93e3eec432fd67 Reviewed-on: https://chromium-review.googlesource.com/906469Reviewed-by: Benedikt Meurer <bmeurer@chromium.org> Commit-Queue: Ivica Bogosavljevic <ivica.bogosavljevic@mips.com> Cr-Commit-Position: refs/heads/master@{#51142}
7352b3f8
Name |
Last commit
|
Last update |
---|---|---|
.. | ||
OWNERS | ||
code-generator-mips64.cc | ||
instruction-codes-mips64.h | ||
instruction-scheduler-mips64.cc | ||
instruction-selector-mips64.cc |