-
Milad Farazmand authored
Port c0eee179 Original Commit Message: ROL will be optional operator as arm, arm64 only have ROR. The reason for this CL is inefficient Wasm codegen for 64-bit left-rotation. R=duongn@microsoft.com, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com BUG= LOG=N Change-Id: I2803237712e45235ac53be07a28b4dc0c0f4a329 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2173574Reviewed-by: Junliang Yan <jyan@ca.ibm.com> Commit-Queue: Milad Farazmand <miladfar@ca.ibm.com> Cr-Commit-Position: refs/heads/master@{#67521}
14785e51