1. 01 Jun, 2021 1 commit
  2. 22 Mar, 2021 1 commit
  3. 11 Jan, 2021 1 commit
    • Andreas Haas's avatar
      [wasm][liftoff] Delay use counter decrement of PeekToRegister · 48ead1a8
      Andreas Haas authored
      This CL fixes a bug in the code generation for I32AtomicCompareExchange
      in Liftoff on ia32. The problem is the inconsistency that
      LiftoffAssembler::PeekToRegister(...) introduces to the cache state.
      PeekToRegister loads the value from the value stack into a register, but
      does not pop the value off the stack. When the value was already stored
      in a register, the use counter of that register gets decreased, even
      though the value is still on the stack.
      
      The problem arises when this register later gets reused, which is
      necessary unfortunately on ia32. When SpillRegister is called for this
      register, all stack values that are stored in this register get written
      to memory. SpillRegister uses the use counter of the register to detect
      when the register was spilled to all stack slots that were cached by
      this register. However, as described above, the value stack and the use
      counter are inconsistent at that moment, so SpillRegister finishes
      early and does not spill the register to all stack values, and this
      causes the bug later.
      
      With this CL the decrement of the use counter gets delayed until when
      the value actually gets popped off the stack.
      
      R=clemensb@chromium.org
      
      Bug: chromium:1145135
      Change-Id: I07cb256a7e5135dbce41b246c120650635ad2758
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2602464Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
      Commit-Queue: Andreas Haas <ahaas@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#72018}
      48ead1a8