1. 12 Feb, 2021 2 commits
  2. 11 Feb, 2021 36 commits
  3. 10 Feb, 2021 2 commits
    • Ng Zhi An's avatar
      [wasm-simd][fuzzer] Add i8x16.popcnt to fuzzer · fc8743da
      Ng Zhi An authored
      Also move it from post-mvp to mvp, since it is now in the proposal.
      
      Bug: v8:11002
      Change-Id: I711ee7a92e6937948c93e6028ef018188ea4c976
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2676937Reviewed-by: 's avatarDeepti Gandluri <gdeepti@chromium.org>
      Commit-Queue: Zhi An Ng <zhin@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#72643}
      fc8743da
    • Milad Fa's avatar
      S390: [wasm-simd] Fix the simulator to correctly represent Simd lanes · efed4036
      Milad Fa authored
      Vector register lane numbers on IBM machines are reversed
      compared to x64. For example, doing an I32x4 extract_lane with
      lane number 0 on x64 will be equal to lane number 3 on IBM machines.
      Vector registers are only used for compiling Wasm code at the moment.
      Wasm is also little endian enforced. On s390 native, we manually do
      a reverse byte whenever values are loaded/stored from memory to
      a Simd register. On the simulator however, we do not reverse the bytes
      and data is just copied as is from one memory location to another
      location which represents a register. To keep the Wasm simulation
      accurate, we need to make sure accessing a lane is correctly simulated
      and as such we reverse the lane number on the getters and setters.
      We need to be careful when getting/setting values on the Low
      or High side of a simulated register. In the simulation, "Low" is
      equal to the MSB and "High" is equal to the LSB on memory.
      
      As a result, many of the "#ifdef V8_TARGET_BIG_ENDIAN" blocks on
      Simd opcodes are not needed anymore as we are now simulating
      native behaviour.
      
      Change-Id: Idfa80cdef7382febb4311c75eb6d3e1d110141fa
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2687756
      Commit-Queue: Milad Fa <mfarazma@redhat.com>
      Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
      Reviewed-by: 's avatarJoran Siu <joransiu@ca.ibm.com>
      Reviewed-by: 's avatarMilad Fa <mfarazma@redhat.com>
      Cr-Commit-Position: refs/heads/master@{#72642}
      efed4036