1. 02 Nov, 2020 22 commits
  2. 01 Nov, 2020 1 commit
  3. 31 Oct, 2020 1 commit
  4. 30 Oct, 2020 14 commits
  5. 29 Oct, 2020 2 commits
    • Zhi An Ng's avatar
      [wasm-simd][liftoff][ia32] Fix operands on non-AVX · 236aff1b
      Zhi An Ng authored
      The main fix here is on non-AVX builds, the shifts require dst == src.
      Calling macro-assembler functions like Psrlw assumes that we already
      met that requirement (which we usually specify in TurboFan's
      instruction-selector). On Liftoff, we need to do that check manually.
      This is done by using the helper EmitSimdShiftOpImm which will do this
      check, and dispatches to AVX if supported, or mov if dst != src.
      
      Also fix a couple of places where we forgot to annotate the required SSE
      extension for the instruction.
      
      Bug: v8:11078
      Change-Id: Icc31df9ab80c041f4bb3bd48444658368eaa2c91
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2505251Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
      Commit-Queue: Zhi An Ng <zhin@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#70889}
      236aff1b
    • Zhi An Ng's avatar
      [wasm-simd][x64] Don't fix dst to src on AVX · d4f7ea80
      Zhi An Ng authored
      On AVX, many instructions can have 3 operands, unlike SSE which only has
      2. So on SSE we use DefineSameAsFirst on the dst. But on AVX, using that
      will cause some unnecessary moves.
      
      This change moves a bunch of instructions that have single instruction
      codegen into a macro list which supports the this non-restricted AVX
      codegen.
      
      Bug: v8:9561
      Change-Id: I348a8396e8a1129daf2e1ed08ae8526e1bc3a73b
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2505254Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
      Commit-Queue: Zhi An Ng <zhin@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#70888}
      d4f7ea80