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  1. 13 Jun, 2016 5 commits
    • bmeurer's avatar
      [builtins] Introduce proper Float64Log1p operator. · 7ceed92a
      bmeurer authored 
      Import base::ieee754::log1p() from fdlibm and introduce a Float64Log1p
TurboFan operator based on that, similar to what we do for Float64Log.
Rewrite Math.log1p() as TurboFan builtin and use that operator to also
inline Math.log1p() into optimized TurboFan functions.

Also unify the handling of the special IEEE 754 functions somewhat in
the TurboFan backends. At some point we can hopefully express this
completely in the InstructionSelector (once we have an idea what to do
with the ST(0) return issue on IA-32/X87).

Drive-by-fix: Add some more test coverage for the log function.

R=yangguo@chromium.org
BUG=v8:5086,v8:5092

Review-Url: https://codereview.chromium.org/2060743002
Cr-Commit-Position: refs/heads/master@{#36914}
      7ceed92a
    • bmeurer's avatar
      [ieee754] Import ANSIfied msun log from FreeBSD. · b01622c3
      bmeurer authored 
      Instead of manually adopting the ancient fdlibm sources, import the msun
versions from FreeBSD instead, which were already adopted to ANSI C.
Still under the same copyright.

R=yangguo@chromium.org
BUG=v8:5065,v8:5086

Review-Url: https://codereview.chromium.org/2065473002
Cr-Commit-Position: refs/heads/master@{#36913}
      b01622c3
    • mtrofin's avatar
      [turbofan] Retiring Greedy Allocator · 8e1ccba3
      mtrofin authored 
      We were able to achieve our goals for register allocation independent of
the allocation algorithm. Performance data so far is inconclusive re. the
value of the Greedy algorithm, compared to the particular Linear Scan
implementation we're currently using, and the performance measurement
techniques we currently use are too imprecise to help with this matter.

Retiring the algorithm to lower maintenance and evolution cost (e.g. lower
cost of adding aliasing support). Once we improve benchmarking stability,
and establish a suite sensitive enough for codegen improvement studies,
we may revive the algorithm, should the need arise.

BUG=

Review-Url: https://codereview.chromium.org/2060673002
Cr-Commit-Position: refs/heads/master@{#36912}
      8e1ccba3
    • mtrofin's avatar
      RelocInfo modes were not propagated when computing · 8c1ba59a
      mtrofin authored 
      MemoryOperands, on IA32. This needed to be fixed so that we can
compile wasm code before creating instances, since the compiled code
needs to be patched up for memory and globals references.

This surfaces in asm-to-wasm scenarios.

Added testing (rather, enhanced existing tests).
Note patch#1 where we fail on ia32, and patch#2 with the fix.

BUG=v8:5072

Review-Url: https://codereview.chromium.org/2061583002
Cr-Commit-Position: refs/heads/master@{#36911}
      8c1ba59a
    • bmeurer's avatar
      Revert of Add a trace-event for each runtime-stats timer (patchset #6... · 35f5b3dc
      bmeurer authored 
      Revert of Add a trace-event for each runtime-stats timer (patchset #6 id:100001 of https://codereview.chromium.org/2052523002/ )

Reason for revert:
Seems to break TSAN, see http://build.chromium.org/p/client.v8/builders/V8%20Linux64%20TSAN/builds/10057

Original issue's description:
> The trace-events will have a high overhead when turned on, but they are in a disabled-by-default category.
>
> As long as the off overhead is negligible, this CL allows us to understand the behavior of V8 rather than its performance at the moment.
>
> BUG=v8:5089
>
> Committed: https://crrev.com/44ec143f26769bd103662643bfeafc7d0834cc90
> Cr-Commit-Position: refs/heads/master@{#36909}

TBR=cbruni@chromium.org,fmeawad@chromium.org
# Skipping CQ checks because original CL landed less than 1 days ago.
NOPRESUBMIT=true
NOTREECHECKS=true
NOTRY=true
BUG=v8:5089

Review-Url: https://codereview.chromium.org/2064553002
Cr-Commit-Position: refs/heads/master@{#36910}
      35f5b3dc
  3. 12 Jun, 2016 2 commits
  5. 11 Jun, 2016 3 commits
  7. 10 Jun, 2016 28 commits
  9. 09 Jun, 2016 2 commits