1. 06 Mar, 2021 3 commits
  2. 05 Mar, 2021 35 commits
  3. 04 Mar, 2021 2 commits
    • Ng Zhi An's avatar
      Reland "[wasm-simd][liftoff] Compile double precision conversions" · 5300b26d
      Ng Zhi An authored
      This is a reland of fe00fbd9
      
      Original change's description:
      > [wasm-simd][liftoff] Compile double precision conversions
      >
      > I missed actually handling these instructions in liftoff-compiler, so
      > even though the assembler functions were implemented for all archs, we
      > weren't running them.
      >
      > This properly handles the instructions and a couple of fixes:
      >
      > - for arm64, typos in using signed instructions for unsigned Wasm ops
      > - for arm, handle the case where dst == src, which leads to us
      > overwriting src and then reading junk from the overwritten portions to
      > convert
      >
      > Bug: v8:11265
      > Change-Id: I7919280bdf395137e95075deb30ed815100df222
      > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2728382
      > Reviewed-by: Clemens Backes <clemensb@chromium.org>
      > Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
      > Commit-Queue: Zhi An Ng <zhin@chromium.org>
      > Cr-Commit-Position: refs/heads/master@{#73178}
      
      Bug: v8:11265
      Change-Id: Ib854b526e74710f03e83d5007e3a3f501363ce86
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2733661Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
      Reviewed-by: 's avatarDeepti Gandluri <gdeepti@chromium.org>
      Commit-Queue: Zhi An Ng <zhin@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#73206}
      5300b26d
    • Shu-yu Guo's avatar
      Revert "[ptr-cage] Reserve base registers on x64 (r14) and arm64 (x28)" · 645631f2
      Shu-yu Guo authored
      This reverts commit 0c63aa9e.
      
      Reason for revert: Breaking clusterfuzz builds
      
      Original change's description:
      > [ptr-cage] Reserve base registers on x64 (r14) and arm64 (x28)
      >
      > Also add a V8_COMPRESS_POINTERS_IN_SHARED_CAGE define when pointer
      > compression is enabled.
      >
      > This CL is to get performance numbers for reserving an extra register.
      > There is no actual pointer cage yet, and the base register will always
      > have the same value as the root register. The pointer decompression code
      > is switched to using the base register instead of the root register.
      >
      > Bug: v8:11460
      > Change-Id: I40bae556c2098608fb6fc193a52694e3f54754bd
      > Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2716075
      > Reviewed-by: Jakob Kummerow <jkummerow@chromium.org>
      > Reviewed-by: Ross McIlroy <rmcilroy@chromium.org>
      > Reviewed-by: Leszek Swirski <leszeks@chromium.org>
      > Commit-Queue: Shu-yu Guo <syg@chromium.org>
      > Cr-Commit-Position: refs/heads/master@{#73204}
      
      Bug: v8:11460
      Change-Id: Idebf1fc6eeeda880a21d65b6f2c674fa58690bfa
      No-Presubmit: true
      No-Tree-Checks: true
      No-Try: true
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2737812
      Auto-Submit: Shu-yu Guo <syg@chromium.org>
      Commit-Queue: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
      Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
      Cr-Commit-Position: refs/heads/master@{#73205}
      645631f2