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  1. 08 Jul, 2016 2 commits
  3. 07 Jul, 2016 31 commits
  5. 06 Jul, 2016 7 commits
    • littledan's avatar
      Revert of [esnext] ship --harmony-object-values-entries (patchset #1 id:1 of... · 1177750a
      littledan authored 
      Revert of [esnext] ship --harmony-object-values-entries (patchset #1 id:1 of https://codereview.chromium.org/2116053003/ )

Reason for revert:
Revert to see if it addresses the performance regression observed in chromium:625956 in automated graphs

Original issue's description:
> [esnext] ship --harmony-object-values-entries
>
> BUG=v8:4663
> R=littledan@chromium.org, adamk@chromium.org
>
> Committed: https://crrev.com/ab529234853a1768642f8f6c907aaaa5ea8b19bf
> Cr-Commit-Position: refs/heads/master@{#37485}

TBR=adamk@chromium.org,caitpotter88@gmail.com
# Not skipping CQ checks because original CL landed more than 1 days ago.
BUG=v8:4663

Review-Url: https://codereview.chromium.org/2129533004
Cr-Commit-Position: refs/heads/master@{#37566}
      1177750a
    • franzih's avatar
      [builtins] Migrate ArrayBufferPrototypeByteLength to C++. · efcd385d
      franzih authored 
      Working on eliminating the use of ClassOf(). This function was checking IS_ARRAYBUFFER.

BUG=

Review-Url: https://codereview.chromium.org/2126603003
Cr-Commit-Position: refs/heads/master@{#37565}
      efcd385d
    • lpy's avatar
      Expose TickSample and its APIs in v8-profiler.h · 3172f6a9
      lpy authored 
      We want to eventually move the profiling functionality out of V8 as library,
this patch exposes TickSample and its APIs in v8-profiler.h so that when
embedders use library, they can have more details.

Minor change: Rename tick-sample.[h|cc] to simulator-helper.[h|cc].

BUG=v8:4789
LOG=N

Review-Url: https://codereview.chromium.org/2105943002
Cr-Commit-Position: refs/heads/master@{#37564}
      3172f6a9
    • bjaideep's avatar
      PPC/s390: [builtins] Add receiver to builtin exit frames · 96ebd756
      bjaideep authored 
      Port f59a2335

Original commit message:

    Stack trace generation requires access to the receiver; and while the
    receiver is already on the stack, we cannot determine its position
    during stack trace generation (it's stored in argv[0], and argc is only
    stored in a callee-saved register).

    This patch grants access to the receiver by pushing argc onto builtin
    exit frames as an extra argument. Compared to simply pushing the
    receiver, this requires an additional dereference during stack trace
    generation, but one fewer during builtin calls.

R=jgruber@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com

BUG=v8:4815
LOG=N

Review-Url: https://codereview.chromium.org/2129643002
Cr-Commit-Position: refs/heads/master@{#37563}
      96ebd756
    • bjaideep's avatar
      PPC: [fullcode][mips][mips64][ppc][s390] Avoid trashing of a home object when... · 5b823bfc
      bjaideep authored 
      PPC: [fullcode][mips][mips64][ppc][s390] Avoid trashing of a home object when doing a keyed store to a super.

Port 43aee033

    Fixed minor typo in ppc file.

R=ishell@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com

BUG=chromium:625590
LOG=N

Review-Url: https://codereview.chromium.org/2125933002
Cr-Commit-Position: refs/heads/master@{#37562}
      5b823bfc
    • bjaideep's avatar
      PPC/s390: [turbofan]: Support using push instructions for setting up tail call parameters · 433572b8
      bjaideep authored 
      Port bd0d9e7d

Original commit message:

    This optimizes the passing of stack parameters in function calls.

    For some architectures (ia32/x64), using pushes when possible instead
    of bumping the stack and then storing parameters generates much
    smaller code, and in some cases is faster (e.g. when a push of a memory
    location can implement a memory-to-memory copy and thus elide an
    intermediate load. On others (e.g. ARM), the benefit is smaller, where
    it's only possible to elide direct stack pointer adjustment in certain cases
    or combine multiple register stores into a single instruction in other limited
    situations. On yet other platforms (ARM64, MIPS), there are no push instructions,
    and this optimization isn't used at all.

    Ideally, this mechanism would be used for both tail calls and normal calls,
    but "normal" calls are currently pretty efficient, and tail calls are very
    inefficient, so this CL sets the bar low for building a new mechanism to
    handle parameter pushing that only needs to raise the bar on tail calls for now.

    The key aspect of this change is that adjustment to the stack pointer
    for tail calls (and perhaps later real calls) is an explicit step separate from
    instruction selection and gap resolution, but aware of both, making it possible
    to safely recognize gap moves that are actually pushes.

R=danno@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com

BUG=
LOG=N

Review-Url: https://codereview.chromium.org/2123983002
Cr-Commit-Position: refs/heads/master@{#37561}
      433572b8
    • machenbach's avatar
      [gn] Add bots for gyp support · a53bf226
      machenbach authored 
      Add temporary bots that continuously test with gyp until its
deprecation.

BUG=chromium:474921
NOTRY=true

Review-Url: https://codereview.chromium.org/2123173002
Cr-Commit-Position: refs/heads/master@{#37560}
      a53bf226