1. 14 Oct, 2019 3 commits
  2. 13 Oct, 2019 1 commit
  3. 12 Oct, 2019 4 commits
  4. 11 Oct, 2019 31 commits
  5. 10 Oct, 2019 1 commit
    • Ng Zhi An's avatar
      Fix loads and stores of s128 for arm · d1f87915
      Ng Zhi An authored
      The vst1 and vld1 instruction does a post-increment access. What we
      intend is the usual access at (base+offset). This change adds a helper
      function that is called for load and stores of s128, which emits the add
      instruction to do base+offset, and then change the addressing mode of
      the load/store to Operand2_R, which generates the variant of vld1/vst1
      without the offset register. This is similar to how kSimd128 values are
      loaded/stored in VisitUnalignedLoad and VisitUnalignedStore.
      
      We also remove kSimd128 cases from UnalignedLoad and UnalignedStore,
      since it is supported (see A3.2.1 Unaligned Data Access, ARM DDI
      0406C.d)
      
      Bug: v8:9746
      Bug: v8:9748
      Change-Id: I60b987ac58a5eaacd498a940625163484a3dc2db
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1834771Reviewed-by: 's avatarDeepti Gandluri <gdeepti@chromium.org>
      Commit-Queue: Zhi An Ng <zhin@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#64229}
      d1f87915