1. 21 Dec, 2019 1 commit
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  3. 19 Dec, 2019 25 commits
  4. 18 Dec, 2019 1 commit
    • Ng Zhi An's avatar
      [liftoff][wasm-simd] Encode SIMD registers in LiftoffRegister · 75fa5d42
      Ng Zhi An authored
      This introduces a new constant kNeedS128RegPair, which is set for
      architecture where a pair of FP registers (DoubleRegister) is mapped to
      single Simd128Register (ARM).
      
      In this case, a new RegClass, kFpRegPair, is defined to represent
      LiftoffRegister of this type. kFpRegPair will be kNoReg on all other
      architectures.
      
      We add 1 more bit to the encoding on ARM, so now the top bit is set for
      kFpRegPair, the second most top bit is set for kGpRegPair. When the top
      bit is set, we encode the FP register code into the bottom bits of
      code_. Note that this is directly encoded, i.e. not added to kMaxGpRegCode,
      so we can save an add/subtract when converting to/from DoubleRegister.
      We only need to store 1 FP register, the low register, since the high
      other register is implicity the next register. Note that the stored
      register is *always* an even-numbered register.
      
      Bug: v8:9909
      Change-Id: I78d603c9938c3d0add9bd3ca77ddebbfa7abbc05
      Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1973276
      Commit-Queue: Zhi An Ng <zhin@chromium.org>
      Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
      Cr-Commit-Position: refs/heads/master@{#65508}
      75fa5d42