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Commit fff8b5ca authored by Deepti Gandluri's avatar Deepti Gandluri Committed by Commit Bot
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[wasm-simd] Fix Interpreter BitSelect and Boolean reductions 

 - Swap BitSelect operand order
 - Simplify, fix bugs for reductions

Bug: v8:8636, v8:8665
Change-Id: I9f43ac8007f9ecb317b1ffa4f99e9c249c58a2dd
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1534972
Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
Reviewed-by: 's avatarClemens Hammacher <clemensh@chromium.org>
Cr-Commit-Position: refs/heads/master@{#60472}
parent d6c888d6
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Inline Side-by-side
Showing with 30 additions and 22 deletions
src/wasm/wasm-interpreter.cc
View file @ fff8b5ca
......@@ -2237,9 +2237,9 @@ class ThreadImpl {
true)
#undef PACK_CASE
case kExprS128Select: {
int4 bool_val = Pop().to_s128().to_i32x4();
int4 v2 = Pop().to_s128().to_i32x4();
int4 v1 = Pop().to_s128().to_i32x4();
int4 bool_val = Pop().to_s128().to_i32x4();
int4 res;
for (size_t i = 0; i < 4; ++i) {
res.val[i] = v2.val[i] ^ ((v1.val[i] ^ v2.val[i]) & bool_val.val[i]);
......@@ -2283,21 +2283,26 @@ class ThreadImpl {
Push(WasmValue(Simd128(res)));
return true;
}
case kExprS1x4AnyTrue:
case kExprS1x8AnyTrue:
case kExprS1x16AnyTrue: {
int4 s = Pop().to_s128().to_i32x4();
bool res = s.val[0] | s.val[1] | s.val[2] | s.val[3];
Push(WasmValue((res)));
return true;
}
#define REDUCTION_CASE(op, name, stype, count, operation) \
case kExpr##op: { \
stype s = Pop().to_s128().to_##name(); \
int32_t res = s.val[0]; \
for (size_t i = 1; i < count; ++i) { \
res = res operation static_cast<int32_t>(s.val[i]); \
bool res = true; \
for (size_t i = 0; i < count; ++i) { \
res = res & static_cast<bool>(s.val[i]); \
} \
Push(WasmValue(res)); \
return true; \
}
REDUCTION_CASE(S1x4AnyTrue, i32x4, int4, 4, |)
REDUCTION_CASE(S1x4AllTrue, i32x4, int4, 4, &)
REDUCTION_CASE(S1x8AnyTrue, i16x8, int8, 8, |)
REDUCTION_CASE(S1x8AllTrue, i16x8, int8, 8, &)
REDUCTION_CASE(S1x16AnyTrue, i8x16, int16, 16, |)
REDUCTION_CASE(S1x16AllTrue, i8x16, int16, 16, &)
#undef REDUCTION_CASE
default:
......
test/cctest/wasm/test-run-wasm-simd.cc
View file @ fff8b5ca
......@@ -336,14 +336,18 @@ T Sqrt(T a) {
// The macro below disables tests lowering for certain nodes where the simd
// lowering doesn't work correctly. Early return here if the CPU does not
// support SIMD as the graph will be implicitly lowered in that case.
#define WASM_SIMD_TEST_TURBOFAN(name) \
void RunWasm_##name##_Impl(LowerSimd lower_simd, \
ExecutionTier execution_tier); \
TEST(RunWasm_##name##_turbofan) { \
if (!CpuFeatures::SupportsWasmSimd128()) return; \
EXPERIMENTAL_FLAG_SCOPE(simd); \
RunWasm_##name##_Impl(kNoLowerSimd, ExecutionTier::kOptimized); \
} \
#define WASM_SIMD_TEST_NO_LOWERING(name) \
void RunWasm_##name##_Impl(LowerSimd lower_simd, \
ExecutionTier execution_tier); \
TEST(RunWasm_##name##_turbofan) { \
if (!CpuFeatures::SupportsWasmSimd128()) return; \
EXPERIMENTAL_FLAG_SCOPE(simd); \
RunWasm_##name##_Impl(kNoLowerSimd, ExecutionTier::kOptimized); \
} \
TEST(RunWasm_##name##_interpreter) { \
EXPERIMENTAL_FLAG_SCOPE(simd); \
RunWasm_##name##_Impl(kNoLowerSimd, ExecutionTier::kInterpreter); \
} \
void RunWasm_##name##_Impl(LowerSimd lower_simd, ExecutionTier execution_tier)
// Returns true if the platform can represent the result.
......@@ -1487,7 +1491,7 @@ WASM_SIMD_TEST(I8x16ShrU) {
// rest false, and comparing for non-equality with zero to convert to a boolean
// vector.
#define WASM_SIMD_SELECT_TEST(format) \
WASM_SIMD_TEST_TURBOFAN(S##format##Select) { \
WASM_SIMD_TEST(S##format##Select) { \
WasmRunner<int32_t, int32_t, int32_t> r(execution_tier, lower_simd); \
byte val1 = 0; \
byte val2 = 1; \
......@@ -1526,7 +1530,7 @@ WASM_SIMD_SELECT_TEST(8x16)
// Test Select by making a mask where the 0th and 3rd lanes are non-zero and the
// rest 0. The mask is not the result of a comparison op.
#define WASM_SIMD_NON_CANONICAL_SELECT_TEST(format) \
WASM_SIMD_TEST_TURBOFAN(S##format##NonCanonicalSelect) { \
WASM_SIMD_TEST_NO_LOWERING(S##format##NonCanonicalSelect) { \
WasmRunner<int32_t, int32_t, int32_t, int32_t> r(execution_tier, \
lower_simd); \
byte val1 = 0; \
......@@ -2220,7 +2224,7 @@ WASM_SIMD_COMPILED_TEST(SimdLoadStoreLoad) {
// and for SIMD lowering.
// TODO(gdeepti): Enable these tests for ARM/ARM64
#define WASM_SIMD_ANYTRUE_TEST(format, lanes, max) \
WASM_SIMD_TEST_TURBOFAN(S##format##AnyTrue) { \
WASM_SIMD_TEST_NO_LOWERING(S##format##AnyTrue) { \
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd); \
byte simd = r.AllocateLocal(kWasmS128); \
BUILD( \
......@@ -2236,7 +2240,7 @@ WASM_SIMD_ANYTRUE_TEST(16x8, 8, 0xffff)
WASM_SIMD_ANYTRUE_TEST(8x16, 16, 0xff)
#define WASM_SIMD_ALLTRUE_TEST(format, lanes, max) \
WASM_SIMD_TEST_TURBOFAN(S##format##AllTrue) { \
WASM_SIMD_TEST_NO_LOWERING(S##format##AllTrue) { \
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd); \
byte simd = r.AllocateLocal(kWasmS128); \
BUILD( \
......@@ -2244,7 +2248,6 @@ WASM_SIMD_ANYTRUE_TEST(8x16, 16, 0xff)
WASM_SET_LOCAL(simd, WASM_SIMD_I##format##_SPLAT(WASM_GET_LOCAL(0))), \
WASM_SIMD_UNOP(kExprS1x##lanes##AllTrue, WASM_GET_LOCAL(simd))); \
DCHECK_EQ(1, r.Call(max)); \
DCHECK_EQ(0, r.Call(21)); \
DCHECK_EQ(0, r.Call(0)); \
}
WASM_SIMD_ALLTRUE_TEST(32x4, 4, 0xffffffff)
......@@ -2252,7 +2255,7 @@ WASM_SIMD_ALLTRUE_TEST(16x8, 8, 0xffff)
WASM_SIMD_ALLTRUE_TEST(8x16, 16, 0xff)
#endif // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_IA32
WASM_SIMD_TEST_TURBOFAN(BitSelect) {
WASM_SIMD_TEST(BitSelect) {
WasmRunner<int32_t, int32_t> r(execution_tier, lower_simd);
byte simd = r.AllocateLocal(kWasmS128);
BUILD(r,
......@@ -2294,7 +2297,7 @@ WASM_SIMD_TEST_TURBOFAN(BitSelect) {
#undef WASM_SIMD_NON_CANONICAL_SELECT_TEST
#undef WASM_SIMD_COMPILED_TEST
#undef WASM_SIMD_BOOL_REDUCTION_TEST
#undef WASM_SIMD_TEST_TURBOFAN
#undef WASM_SIMD_TEST_NO_LOWERING
#undef WASM_SIMD_ANYTRUE_TEST
#undef WASM_SIMD_ALLTRUE_TEST
......
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