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Commit fee0051b authored by Junliang Yan's avatar Junliang Yan Committed by V8 LUCI CQ
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ppc: [liftoff] fix Float copysign operation 

Change-Id: Icdef3916993e14e39ef9da70af128b9fde2d3b60
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3158323Reviewed-by: 's avatarMilad Fa <mfarazma@redhat.com>
Commit-Queue: Junliang Yan <junyan@redhat.com>
Cr-Commit-Position: refs/heads/main@{#76797}
parent de46367d
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Showing with 91 additions and 84 deletions
src/codegen/ppc/macro-assembler-ppc.cc
View file @ fee0051b
......@@ -3056,6 +3056,11 @@ void TurboAssembler::DivF32(DoubleRegister dst, DoubleRegister lhs,
frsp(dst, dst, r);
}
void TurboAssembler::CopySignF64(DoubleRegister dst, DoubleRegister lhs,
DoubleRegister rhs, RCBit r) {
fcpsgn(dst, rhs, lhs, r);
}
void MacroAssembler::CmpSmiLiteral(Register src1, Smi smi, Register scratch,
CRegister cr) {
#if defined(V8_COMPRESS_POINTERS) || defined(V8_31BIT_SMIS_ON_64BIT_ARCH)
......
src/codegen/ppc/macro-assembler-ppc.h
View file @ fee0051b
......@@ -279,6 +279,8 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
RCBit r = LeaveRC);
void DivF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
RCBit r = LeaveRC);
void CopySignF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs,
RCBit r = LeaveRC);
void Push(Register src) { push(src); }
// Push a handle.
......
src/execution/ppc/simulator-ppc.cc
View file @ fee0051b
......@@ -3688,7 +3688,7 @@ void Simulator::ExecuteGeneric(Instruction* instr) {
int fra = instr->RAValue();
double frb_val = get_double_from_d_register(frb);
double fra_val = get_double_from_d_register(fra);
double frt_val = std::copysign(fra_val, frb_val);
double frt_val = std::copysign(frb_val, fra_val);
set_d_register_from_double(frt, frt_val);
return;
}
......
src/wasm/baseline/ppc/liftoff-assembler-ppc.h
View file @ fee0051b
......@@ -841,89 +841,89 @@ UNOP_LIST(EMIT_UNOP_FUNCTION)
// V(name, instr, dtype, stype1, stype2, dcast, scast1, scast2, rcast,
// return_val, return_type)
#define BINOP_LIST(V) \
V(f32_copysign, fcpsgn, DoubleRegister, DoubleRegister, DoubleRegister, , , \
, ROUND_F64_TO_F32, , void) \
V(f64_copysign, fcpsgn, DoubleRegister, DoubleRegister, DoubleRegister, , , \
, USE, , void) \
V(f32_min, MinF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f32_max, MaxF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f64_min, MinF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f64_max, MaxF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(i64_sub, SubS64, LiftoffRegister, LiftoffRegister, LiftoffRegister, \
LFR_TO_REG, LFR_TO_REG, LFR_TO_REG, USE, , void) \
V(i64_add, AddS64, LiftoffRegister, LiftoffRegister, LiftoffRegister, \
LFR_TO_REG, LFR_TO_REG, LFR_TO_REG, USE, , void) \
V(i64_addi, AddS64, LiftoffRegister, LiftoffRegister, int64_t, LFR_TO_REG, \
LFR_TO_REG, Operand, USE, , void) \
V(i32_sub, SubS32, Register, Register, Register, , , , USE, , void) \
V(i32_add, AddS32, Register, Register, Register, , , , USE, , void) \
V(i32_addi, AddS32, Register, Register, int32_t, , , Operand, USE, , void) \
V(i32_subi, SubS32, Register, Register, int32_t, , , Operand, USE, , void) \
V(i32_mul, MulS32, Register, Register, Register, , , , USE, , void) \
V(i64_mul, MulS64, LiftoffRegister, LiftoffRegister, LiftoffRegister, \
LFR_TO_REG, LFR_TO_REG, LFR_TO_REG, USE, , void) \
V(i32_andi, AndU32, Register, Register, int32_t, , , Operand, USE, , void) \
V(i32_ori, OrU32, Register, Register, int32_t, , , Operand, USE, , void) \
V(i32_xori, XorU32, Register, Register, int32_t, , , Operand, USE, , void) \
V(i32_and, AndU32, Register, Register, Register, , , , USE, , void) \
V(i32_or, OrU32, Register, Register, Register, , , , USE, , void) \
V(i32_xor, XorU32, Register, Register, Register, , , , USE, , void) \
V(i64_and, AndU64, LiftoffRegister, LiftoffRegister, LiftoffRegister, \
LFR_TO_REG, LFR_TO_REG, LFR_TO_REG, USE, , void) \
V(i64_or, OrU64, LiftoffRegister, LiftoffRegister, LiftoffRegister, \
LFR_TO_REG, LFR_TO_REG, LFR_TO_REG, USE, , void) \
V(i64_xor, XorU64, LiftoffRegister, LiftoffRegister, LiftoffRegister, \
LFR_TO_REG, LFR_TO_REG, LFR_TO_REG, USE, , void) \
V(i64_andi, AndU64, LiftoffRegister, LiftoffRegister, int32_t, LFR_TO_REG, \
LFR_TO_REG, Operand, USE, , void) \
V(i64_ori, OrU64, LiftoffRegister, LiftoffRegister, int32_t, LFR_TO_REG, \
LFR_TO_REG, Operand, USE, , void) \
V(i64_xori, XorU64, LiftoffRegister, LiftoffRegister, int32_t, LFR_TO_REG, \
LFR_TO_REG, Operand, USE, , void) \
V(i32_shli, ShiftLeftU32, Register, Register, int32_t, , , \
INT32_AND_WITH_1F, USE, , void) \
V(i32_sari, ShiftRightS32, Register, Register, int32_t, , , \
INT32_AND_WITH_1F, USE, , void) \
V(i32_shri, ShiftRightU32, Register, Register, int32_t, , , \
INT32_AND_WITH_1F, USE, , void) \
V(i32_shl, ShiftLeftU32, Register, Register, Register, , , \
REGISTER_AND_WITH_1F, USE, , void) \
V(i32_sar, ShiftRightS32, Register, Register, Register, , , \
REGISTER_AND_WITH_1F, USE, , void) \
V(i32_shr, ShiftRightU32, Register, Register, Register, , , \
REGISTER_AND_WITH_1F, USE, , void) \
V(i64_shl, ShiftLeftU64, LiftoffRegister, LiftoffRegister, Register, \
LFR_TO_REG, LFR_TO_REG, REGISTER_AND_WITH_3F, USE, , void) \
V(i64_sar, ShiftRightS64, LiftoffRegister, LiftoffRegister, Register, \
LFR_TO_REG, LFR_TO_REG, REGISTER_AND_WITH_3F, USE, , void) \
V(i64_shr, ShiftRightU64, LiftoffRegister, LiftoffRegister, Register, \
LFR_TO_REG, LFR_TO_REG, REGISTER_AND_WITH_3F, USE, , void) \
V(i64_shli, ShiftLeftU64, LiftoffRegister, LiftoffRegister, int32_t, \
LFR_TO_REG, LFR_TO_REG, INT32_AND_WITH_3F, USE, , void) \
V(i64_sari, ShiftRightS64, LiftoffRegister, LiftoffRegister, int32_t, \
LFR_TO_REG, LFR_TO_REG, INT32_AND_WITH_3F, USE, , void) \
V(i64_shri, ShiftRightU64, LiftoffRegister, LiftoffRegister, int32_t, \
LFR_TO_REG, LFR_TO_REG, INT32_AND_WITH_3F, USE, , void) \
V(f64_add, AddF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f64_sub, SubF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f64_mul, MulF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f64_div, DivF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f32_add, AddF32, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f32_sub, SubF32, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f32_mul, MulF32, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f32_div, DivF32, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
#define BINOP_LIST(V) \
V(f32_copysign, CopySignF64, DoubleRegister, DoubleRegister, DoubleRegister, \
, , , ROUND_F64_TO_F32, , void) \
V(f64_copysign, CopySignF64, DoubleRegister, DoubleRegister, DoubleRegister, \
, , , USE, , void) \
V(f32_min, MinF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f32_max, MaxF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f64_min, MinF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f64_max, MaxF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(i64_sub, SubS64, LiftoffRegister, LiftoffRegister, LiftoffRegister, \
LFR_TO_REG, LFR_TO_REG, LFR_TO_REG, USE, , void) \
V(i64_add, AddS64, LiftoffRegister, LiftoffRegister, LiftoffRegister, \
LFR_TO_REG, LFR_TO_REG, LFR_TO_REG, USE, , void) \
V(i64_addi, AddS64, LiftoffRegister, LiftoffRegister, int64_t, LFR_TO_REG, \
LFR_TO_REG, Operand, USE, , void) \
V(i32_sub, SubS32, Register, Register, Register, , , , USE, , void) \
V(i32_add, AddS32, Register, Register, Register, , , , USE, , void) \
V(i32_addi, AddS32, Register, Register, int32_t, , , Operand, USE, , void) \
V(i32_subi, SubS32, Register, Register, int32_t, , , Operand, USE, , void) \
V(i32_mul, MulS32, Register, Register, Register, , , , USE, , void) \
V(i64_mul, MulS64, LiftoffRegister, LiftoffRegister, LiftoffRegister, \
LFR_TO_REG, LFR_TO_REG, LFR_TO_REG, USE, , void) \
V(i32_andi, AndU32, Register, Register, int32_t, , , Operand, USE, , void) \
V(i32_ori, OrU32, Register, Register, int32_t, , , Operand, USE, , void) \
V(i32_xori, XorU32, Register, Register, int32_t, , , Operand, USE, , void) \
V(i32_and, AndU32, Register, Register, Register, , , , USE, , void) \
V(i32_or, OrU32, Register, Register, Register, , , , USE, , void) \
V(i32_xor, XorU32, Register, Register, Register, , , , USE, , void) \
V(i64_and, AndU64, LiftoffRegister, LiftoffRegister, LiftoffRegister, \
LFR_TO_REG, LFR_TO_REG, LFR_TO_REG, USE, , void) \
V(i64_or, OrU64, LiftoffRegister, LiftoffRegister, LiftoffRegister, \
LFR_TO_REG, LFR_TO_REG, LFR_TO_REG, USE, , void) \
V(i64_xor, XorU64, LiftoffRegister, LiftoffRegister, LiftoffRegister, \
LFR_TO_REG, LFR_TO_REG, LFR_TO_REG, USE, , void) \
V(i64_andi, AndU64, LiftoffRegister, LiftoffRegister, int32_t, LFR_TO_REG, \
LFR_TO_REG, Operand, USE, , void) \
V(i64_ori, OrU64, LiftoffRegister, LiftoffRegister, int32_t, LFR_TO_REG, \
LFR_TO_REG, Operand, USE, , void) \
V(i64_xori, XorU64, LiftoffRegister, LiftoffRegister, int32_t, LFR_TO_REG, \
LFR_TO_REG, Operand, USE, , void) \
V(i32_shli, ShiftLeftU32, Register, Register, int32_t, , , \
INT32_AND_WITH_1F, USE, , void) \
V(i32_sari, ShiftRightS32, Register, Register, int32_t, , , \
INT32_AND_WITH_1F, USE, , void) \
V(i32_shri, ShiftRightU32, Register, Register, int32_t, , , \
INT32_AND_WITH_1F, USE, , void) \
V(i32_shl, ShiftLeftU32, Register, Register, Register, , , \
REGISTER_AND_WITH_1F, USE, , void) \
V(i32_sar, ShiftRightS32, Register, Register, Register, , , \
REGISTER_AND_WITH_1F, USE, , void) \
V(i32_shr, ShiftRightU32, Register, Register, Register, , , \
REGISTER_AND_WITH_1F, USE, , void) \
V(i64_shl, ShiftLeftU64, LiftoffRegister, LiftoffRegister, Register, \
LFR_TO_REG, LFR_TO_REG, REGISTER_AND_WITH_3F, USE, , void) \
V(i64_sar, ShiftRightS64, LiftoffRegister, LiftoffRegister, Register, \
LFR_TO_REG, LFR_TO_REG, REGISTER_AND_WITH_3F, USE, , void) \
V(i64_shr, ShiftRightU64, LiftoffRegister, LiftoffRegister, Register, \
LFR_TO_REG, LFR_TO_REG, REGISTER_AND_WITH_3F, USE, , void) \
V(i64_shli, ShiftLeftU64, LiftoffRegister, LiftoffRegister, int32_t, \
LFR_TO_REG, LFR_TO_REG, INT32_AND_WITH_3F, USE, , void) \
V(i64_sari, ShiftRightS64, LiftoffRegister, LiftoffRegister, int32_t, \
LFR_TO_REG, LFR_TO_REG, INT32_AND_WITH_3F, USE, , void) \
V(i64_shri, ShiftRightU64, LiftoffRegister, LiftoffRegister, int32_t, \
LFR_TO_REG, LFR_TO_REG, INT32_AND_WITH_3F, USE, , void) \
V(f64_add, AddF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f64_sub, SubF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f64_mul, MulF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f64_div, DivF64, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f32_add, AddF32, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f32_sub, SubF32, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f32_mul, MulF32, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void) \
V(f32_div, DivF32, DoubleRegister, DoubleRegister, DoubleRegister, , , , \
USE, , void)
#define EMIT_BINOP_FUNCTION(name, instr, dtype, stype1, stype2, dcast, scast1, \
......
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