Commit fe424b3b authored by Zhao Jiazhong's avatar Zhao Jiazhong Committed by Commit Bot

[mips][wasm] Turn ValueType from an enum to a class.

Port f3b4167f
https://crrev.com/c/2091471

Original Commit Message:

  In preparation for adding reference types, which need an additional
  parameter to indicate the referenced type.

Change-Id: I1b66bffea3ac2637886673476c8f7d62150b33a3
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2100695
Auto-Submit: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Reviewed-by: 's avatarJakob Kummerow <jkummerow@chromium.org>
Commit-Queue: Jakob Kummerow <jkummerow@chromium.org>
Cr-Commit-Position: refs/heads/master@{#66699}
parent 1c565fdc
...@@ -59,20 +59,20 @@ inline MemOperand GetInstanceOperand() { return GetStackSlot(kInstanceOffset); } ...@@ -59,20 +59,20 @@ inline MemOperand GetInstanceOperand() { return GetStackSlot(kInstanceOffset); }
inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, Register base, inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, Register base,
int32_t offset, ValueType type) { int32_t offset, ValueType type) {
MemOperand src(base, offset); MemOperand src(base, offset);
switch (type) { switch (type.kind()) {
case kWasmI32: case ValueType::kI32:
assm->lw(dst.gp(), src); assm->lw(dst.gp(), src);
break; break;
case kWasmI64: case ValueType::kI64:
assm->lw(dst.low_gp(), assm->lw(dst.low_gp(),
MemOperand(base, offset + liftoff::kLowWordOffset)); MemOperand(base, offset + liftoff::kLowWordOffset));
assm->lw(dst.high_gp(), assm->lw(dst.high_gp(),
MemOperand(base, offset + liftoff::kHighWordOffset)); MemOperand(base, offset + liftoff::kHighWordOffset));
break; break;
case kWasmF32: case ValueType::kF32:
assm->lwc1(dst.fp(), src); assm->lwc1(dst.fp(), src);
break; break;
case kWasmF64: case ValueType::kF64:
assm->Ldc1(dst.fp(), src); assm->Ldc1(dst.fp(), src);
break; break;
default: default:
...@@ -83,20 +83,20 @@ inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, Register base, ...@@ -83,20 +83,20 @@ inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, Register base,
inline void Store(LiftoffAssembler* assm, Register base, int32_t offset, inline void Store(LiftoffAssembler* assm, Register base, int32_t offset,
LiftoffRegister src, ValueType type) { LiftoffRegister src, ValueType type) {
MemOperand dst(base, offset); MemOperand dst(base, offset);
switch (type) { switch (type.kind()) {
case kWasmI32: case ValueType::kI32:
assm->Usw(src.gp(), dst); assm->Usw(src.gp(), dst);
break; break;
case kWasmI64: case ValueType::kI64:
assm->Usw(src.low_gp(), assm->Usw(src.low_gp(),
MemOperand(base, offset + liftoff::kLowWordOffset)); MemOperand(base, offset + liftoff::kLowWordOffset));
assm->Usw(src.high_gp(), assm->Usw(src.high_gp(),
MemOperand(base, offset + liftoff::kHighWordOffset)); MemOperand(base, offset + liftoff::kHighWordOffset));
break; break;
case kWasmF32: case ValueType::kF32:
assm->Uswc1(src.fp(), dst, t8); assm->Uswc1(src.fp(), dst, t8);
break; break;
case kWasmF64: case ValueType::kF64:
assm->Usdc1(src.fp(), dst, t8); assm->Usdc1(src.fp(), dst, t8);
break; break;
default: default:
...@@ -105,18 +105,18 @@ inline void Store(LiftoffAssembler* assm, Register base, int32_t offset, ...@@ -105,18 +105,18 @@ inline void Store(LiftoffAssembler* assm, Register base, int32_t offset,
} }
inline void push(LiftoffAssembler* assm, LiftoffRegister reg, ValueType type) { inline void push(LiftoffAssembler* assm, LiftoffRegister reg, ValueType type) {
switch (type) { switch (type.kind()) {
case kWasmI32: case ValueType::kI32:
assm->push(reg.gp()); assm->push(reg.gp());
break; break;
case kWasmI64: case ValueType::kI64:
assm->Push(reg.high_gp(), reg.low_gp()); assm->Push(reg.high_gp(), reg.low_gp());
break; break;
case kWasmF32: case ValueType::kF32:
assm->addiu(sp, sp, -sizeof(float)); assm->addiu(sp, sp, -sizeof(float));
assm->swc1(reg.fp(), MemOperand(sp, 0)); assm->swc1(reg.fp(), MemOperand(sp, 0));
break; break;
case kWasmF64: case ValueType::kF64:
assm->addiu(sp, sp, -sizeof(double)); assm->addiu(sp, sp, -sizeof(double));
assm->Sdc1(reg.fp(), MemOperand(sp, 0)); assm->Sdc1(reg.fp(), MemOperand(sp, 0));
break; break;
...@@ -298,17 +298,17 @@ constexpr int LiftoffAssembler::StaticStackFrameSize() { ...@@ -298,17 +298,17 @@ constexpr int LiftoffAssembler::StaticStackFrameSize() {
} }
int LiftoffAssembler::SlotSizeForType(ValueType type) { int LiftoffAssembler::SlotSizeForType(ValueType type) {
switch (type) { switch (type.kind()) {
case kWasmS128: case ValueType::kS128:
return ValueTypes::ElementSizeInBytes(type); return type.element_size_bytes();
default: default:
return kStackSlotSize; return kStackSlotSize;
} }
} }
bool LiftoffAssembler::NeedsAlignment(ValueType type) { bool LiftoffAssembler::NeedsAlignment(ValueType type) {
switch (type) { switch (type.kind()) {
case kWasmS128: case ValueType::kS128:
return true; return true;
default: default:
// No alignment because all other types are kStackSlotSize. // No alignment because all other types are kStackSlotSize.
...@@ -318,11 +318,11 @@ bool LiftoffAssembler::NeedsAlignment(ValueType type) { ...@@ -318,11 +318,11 @@ bool LiftoffAssembler::NeedsAlignment(ValueType type) {
void LiftoffAssembler::LoadConstant(LiftoffRegister reg, WasmValue value, void LiftoffAssembler::LoadConstant(LiftoffRegister reg, WasmValue value,
RelocInfo::Mode rmode) { RelocInfo::Mode rmode) {
switch (value.type()) { switch (value.type().kind()) {
case kWasmI32: case ValueType::kI32:
TurboAssembler::li(reg.gp(), Operand(value.to_i32(), rmode)); TurboAssembler::li(reg.gp(), Operand(value.to_i32(), rmode));
break; break;
case kWasmI64: { case ValueType::kI64: {
DCHECK(RelocInfo::IsNone(rmode)); DCHECK(RelocInfo::IsNone(rmode));
int32_t low_word = value.to_i64(); int32_t low_word = value.to_i64();
int32_t high_word = value.to_i64() >> 32; int32_t high_word = value.to_i64() >> 32;
...@@ -330,10 +330,10 @@ void LiftoffAssembler::LoadConstant(LiftoffRegister reg, WasmValue value, ...@@ -330,10 +330,10 @@ void LiftoffAssembler::LoadConstant(LiftoffRegister reg, WasmValue value,
TurboAssembler::li(reg.high_gp(), Operand(high_word)); TurboAssembler::li(reg.high_gp(), Operand(high_word));
break; break;
} }
case kWasmF32: case ValueType::kF32:
TurboAssembler::Move(reg.fp(), value.to_f32_boxed().get_bits()); TurboAssembler::Move(reg.fp(), value.to_f32_boxed().get_bits());
break; break;
case kWasmF64: case ValueType::kF64:
TurboAssembler::Move(reg.fp(), value.to_f64_boxed().get_bits()); TurboAssembler::Move(reg.fp(), value.to_f64_boxed().get_bits());
break; break;
default: default:
...@@ -612,18 +612,18 @@ void LiftoffAssembler::Move(DoubleRegister dst, DoubleRegister src, ...@@ -612,18 +612,18 @@ void LiftoffAssembler::Move(DoubleRegister dst, DoubleRegister src,
void LiftoffAssembler::Spill(int offset, LiftoffRegister reg, ValueType type) { void LiftoffAssembler::Spill(int offset, LiftoffRegister reg, ValueType type) {
RecordUsedSpillOffset(offset); RecordUsedSpillOffset(offset);
MemOperand dst = liftoff::GetStackSlot(offset); MemOperand dst = liftoff::GetStackSlot(offset);
switch (type) { switch (type.kind()) {
case kWasmI32: case ValueType::kI32:
sw(reg.gp(), dst); sw(reg.gp(), dst);
break; break;
case kWasmI64: case ValueType::kI64:
sw(reg.low_gp(), liftoff::GetHalfStackSlot(offset, kLowWord)); sw(reg.low_gp(), liftoff::GetHalfStackSlot(offset, kLowWord));
sw(reg.high_gp(), liftoff::GetHalfStackSlot(offset, kHighWord)); sw(reg.high_gp(), liftoff::GetHalfStackSlot(offset, kHighWord));
break; break;
case kWasmF32: case ValueType::kF32:
swc1(reg.fp(), dst); swc1(reg.fp(), dst);
break; break;
case kWasmF64: case ValueType::kF64:
TurboAssembler::Sdc1(reg.fp(), dst); TurboAssembler::Sdc1(reg.fp(), dst);
break; break;
default: default:
...@@ -634,14 +634,14 @@ void LiftoffAssembler::Spill(int offset, LiftoffRegister reg, ValueType type) { ...@@ -634,14 +634,14 @@ void LiftoffAssembler::Spill(int offset, LiftoffRegister reg, ValueType type) {
void LiftoffAssembler::Spill(int offset, WasmValue value) { void LiftoffAssembler::Spill(int offset, WasmValue value) {
RecordUsedSpillOffset(offset); RecordUsedSpillOffset(offset);
MemOperand dst = liftoff::GetStackSlot(offset); MemOperand dst = liftoff::GetStackSlot(offset);
switch (value.type()) { switch (value.type().kind()) {
case kWasmI32: { case ValueType::kI32: {
LiftoffRegister tmp = GetUnusedRegister(kGpReg); LiftoffRegister tmp = GetUnusedRegister(kGpReg);
TurboAssembler::li(tmp.gp(), Operand(value.to_i32())); TurboAssembler::li(tmp.gp(), Operand(value.to_i32()));
sw(tmp.gp(), dst); sw(tmp.gp(), dst);
break; break;
} }
case kWasmI64: { case ValueType::kI64: {
LiftoffRegister tmp = GetUnusedRegister(kGpRegPair); LiftoffRegister tmp = GetUnusedRegister(kGpRegPair);
int32_t low_word = value.to_i64(); int32_t low_word = value.to_i64();
...@@ -662,18 +662,18 @@ void LiftoffAssembler::Spill(int offset, WasmValue value) { ...@@ -662,18 +662,18 @@ void LiftoffAssembler::Spill(int offset, WasmValue value) {
void LiftoffAssembler::Fill(LiftoffRegister reg, int offset, ValueType type) { void LiftoffAssembler::Fill(LiftoffRegister reg, int offset, ValueType type) {
MemOperand src = liftoff::GetStackSlot(offset); MemOperand src = liftoff::GetStackSlot(offset);
switch (type) { switch (type.kind()) {
case kWasmI32: case ValueType::kI32:
lw(reg.gp(), src); lw(reg.gp(), src);
break; break;
case kWasmI64: case ValueType::kI64:
lw(reg.low_gp(), liftoff::GetHalfStackSlot(offset, kLowWord)); lw(reg.low_gp(), liftoff::GetHalfStackSlot(offset, kLowWord));
lw(reg.high_gp(), liftoff::GetHalfStackSlot(offset, kHighWord)); lw(reg.high_gp(), liftoff::GetHalfStackSlot(offset, kHighWord));
break; break;
case kWasmF32: case ValueType::kF32:
lwc1(reg.fp(), src); lwc1(reg.fp(), src);
break; break;
case kWasmF64: case ValueType::kF64:
TurboAssembler::Ldc1(reg.fp(), src); TurboAssembler::Ldc1(reg.fp(), src);
break; break;
default: default:
...@@ -1780,7 +1780,7 @@ void LiftoffAssembler::CallC(const wasm::FunctionSig* sig, ...@@ -1780,7 +1780,7 @@ void LiftoffAssembler::CallC(const wasm::FunctionSig* sig,
int arg_bytes = 0; int arg_bytes = 0;
for (ValueType param_type : sig->parameters()) { for (ValueType param_type : sig->parameters()) {
liftoff::Store(this, sp, arg_bytes, *args++, param_type); liftoff::Store(this, sp, arg_bytes, *args++, param_type);
arg_bytes += ValueTypes::MemSize(param_type); arg_bytes += param_type.element_size_bytes();
} }
DCHECK_LE(arg_bytes, stack_bytes); DCHECK_LE(arg_bytes, stack_bytes);
...@@ -1848,7 +1848,7 @@ void LiftoffStackSlots::Construct() { ...@@ -1848,7 +1848,7 @@ void LiftoffStackSlots::Construct() {
const LiftoffAssembler::VarState& src = slot.src_; const LiftoffAssembler::VarState& src = slot.src_;
switch (src.loc()) { switch (src.loc()) {
case LiftoffAssembler::VarState::kStack: { case LiftoffAssembler::VarState::kStack: {
if (src.type() == kWasmF64) { if (src.type().kind() == ValueType::kF64) {
DCHECK_EQ(kLowWord, slot.half_); DCHECK_EQ(kLowWord, slot.half_);
asm_->lw(kScratchReg, asm_->lw(kScratchReg,
liftoff::GetHalfStackSlot(slot.src_offset_, kHighWord)); liftoff::GetHalfStackSlot(slot.src_offset_, kHighWord));
...@@ -1860,7 +1860,7 @@ void LiftoffStackSlots::Construct() { ...@@ -1860,7 +1860,7 @@ void LiftoffStackSlots::Construct() {
break; break;
} }
case LiftoffAssembler::VarState::kRegister: case LiftoffAssembler::VarState::kRegister:
if (src.type() == kWasmI64) { if (src.type().kind() == ValueType::kI64) {
liftoff::push( liftoff::push(
asm_, slot.half_ == kLowWord ? src.reg().low() : src.reg().high(), asm_, slot.half_ == kLowWord ? src.reg().low() : src.reg().high(),
kWasmI32); kWasmI32);
......
...@@ -48,17 +48,17 @@ inline MemOperand GetInstanceOperand() { return GetStackSlot(kInstanceOffset); } ...@@ -48,17 +48,17 @@ inline MemOperand GetInstanceOperand() { return GetStackSlot(kInstanceOffset); }
inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, MemOperand src, inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, MemOperand src,
ValueType type) { ValueType type) {
switch (type) { switch (type.kind()) {
case kWasmI32: case ValueType::kI32:
assm->lw(dst.gp(), src); assm->lw(dst.gp(), src);
break; break;
case kWasmI64: case ValueType::kI64:
assm->ld(dst.gp(), src); assm->ld(dst.gp(), src);
break; break;
case kWasmF32: case ValueType::kF32:
assm->lwc1(dst.fp(), src); assm->lwc1(dst.fp(), src);
break; break;
case kWasmF64: case ValueType::kF64:
assm->Ldc1(dst.fp(), src); assm->Ldc1(dst.fp(), src);
break; break;
default: default:
...@@ -69,17 +69,17 @@ inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, MemOperand src, ...@@ -69,17 +69,17 @@ inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, MemOperand src,
inline void Store(LiftoffAssembler* assm, Register base, int32_t offset, inline void Store(LiftoffAssembler* assm, Register base, int32_t offset,
LiftoffRegister src, ValueType type) { LiftoffRegister src, ValueType type) {
MemOperand dst(base, offset); MemOperand dst(base, offset);
switch (type) { switch (type.kind()) {
case kWasmI32: case ValueType::kI32:
assm->Usw(src.gp(), dst); assm->Usw(src.gp(), dst);
break; break;
case kWasmI64: case ValueType::kI64:
assm->Usd(src.gp(), dst); assm->Usd(src.gp(), dst);
break; break;
case kWasmF32: case ValueType::kF32:
assm->Uswc1(src.fp(), dst, t8); assm->Uswc1(src.fp(), dst, t8);
break; break;
case kWasmF64: case ValueType::kF64:
assm->Usdc1(src.fp(), dst, t8); assm->Usdc1(src.fp(), dst, t8);
break; break;
default: default:
...@@ -88,19 +88,19 @@ inline void Store(LiftoffAssembler* assm, Register base, int32_t offset, ...@@ -88,19 +88,19 @@ inline void Store(LiftoffAssembler* assm, Register base, int32_t offset,
} }
inline void push(LiftoffAssembler* assm, LiftoffRegister reg, ValueType type) { inline void push(LiftoffAssembler* assm, LiftoffRegister reg, ValueType type) {
switch (type) { switch (type.kind()) {
case kWasmI32: case ValueType::kI32:
assm->daddiu(sp, sp, -kSystemPointerSize); assm->daddiu(sp, sp, -kSystemPointerSize);
assm->sw(reg.gp(), MemOperand(sp, 0)); assm->sw(reg.gp(), MemOperand(sp, 0));
break; break;
case kWasmI64: case ValueType::kI64:
assm->push(reg.gp()); assm->push(reg.gp());
break; break;
case kWasmF32: case ValueType::kF32:
assm->daddiu(sp, sp, -kSystemPointerSize); assm->daddiu(sp, sp, -kSystemPointerSize);
assm->swc1(reg.fp(), MemOperand(sp, 0)); assm->swc1(reg.fp(), MemOperand(sp, 0));
break; break;
case kWasmF64: case ValueType::kF64:
assm->daddiu(sp, sp, -kSystemPointerSize); assm->daddiu(sp, sp, -kSystemPointerSize);
assm->Sdc1(reg.fp(), MemOperand(sp, 0)); assm->Sdc1(reg.fp(), MemOperand(sp, 0));
break; break;
...@@ -256,17 +256,17 @@ constexpr int LiftoffAssembler::StaticStackFrameSize() { ...@@ -256,17 +256,17 @@ constexpr int LiftoffAssembler::StaticStackFrameSize() {
} }
int LiftoffAssembler::SlotSizeForType(ValueType type) { int LiftoffAssembler::SlotSizeForType(ValueType type) {
switch (type) { switch (type.kind()) {
case kWasmS128: case ValueType::kS128:
return ValueTypes::ElementSizeInBytes(type); return type.element_size_bytes();
default: default:
return kStackSlotSize; return kStackSlotSize;
} }
} }
bool LiftoffAssembler::NeedsAlignment(ValueType type) { bool LiftoffAssembler::NeedsAlignment(ValueType type) {
switch (type) { switch (type.kind()) {
case kWasmS128: case ValueType::kS128:
return true; return true;
default: default:
// No alignment because all other types are kStackSlotSize. // No alignment because all other types are kStackSlotSize.
...@@ -276,17 +276,17 @@ bool LiftoffAssembler::NeedsAlignment(ValueType type) { ...@@ -276,17 +276,17 @@ bool LiftoffAssembler::NeedsAlignment(ValueType type) {
void LiftoffAssembler::LoadConstant(LiftoffRegister reg, WasmValue value, void LiftoffAssembler::LoadConstant(LiftoffRegister reg, WasmValue value,
RelocInfo::Mode rmode) { RelocInfo::Mode rmode) {
switch (value.type()) { switch (value.type().kind()) {
case kWasmI32: case ValueType::kI32:
TurboAssembler::li(reg.gp(), Operand(value.to_i32(), rmode)); TurboAssembler::li(reg.gp(), Operand(value.to_i32(), rmode));
break; break;
case kWasmI64: case ValueType::kI64:
TurboAssembler::li(reg.gp(), Operand(value.to_i64(), rmode)); TurboAssembler::li(reg.gp(), Operand(value.to_i64(), rmode));
break; break;
case kWasmF32: case ValueType::kF32:
TurboAssembler::Move(reg.fp(), value.to_f32_boxed().get_bits()); TurboAssembler::Move(reg.fp(), value.to_f32_boxed().get_bits());
break; break;
case kWasmF64: case ValueType::kF64:
TurboAssembler::Move(reg.fp(), value.to_f64_boxed().get_bits()); TurboAssembler::Move(reg.fp(), value.to_f64_boxed().get_bits());
break; break;
default: default:
...@@ -529,17 +529,17 @@ void LiftoffAssembler::Move(DoubleRegister dst, DoubleRegister src, ...@@ -529,17 +529,17 @@ void LiftoffAssembler::Move(DoubleRegister dst, DoubleRegister src,
void LiftoffAssembler::Spill(int offset, LiftoffRegister reg, ValueType type) { void LiftoffAssembler::Spill(int offset, LiftoffRegister reg, ValueType type) {
RecordUsedSpillOffset(offset); RecordUsedSpillOffset(offset);
MemOperand dst = liftoff::GetStackSlot(offset); MemOperand dst = liftoff::GetStackSlot(offset);
switch (type) { switch (type.kind()) {
case kWasmI32: case ValueType::kI32:
Sw(reg.gp(), dst); Sw(reg.gp(), dst);
break; break;
case kWasmI64: case ValueType::kI64:
Sd(reg.gp(), dst); Sd(reg.gp(), dst);
break; break;
case kWasmF32: case ValueType::kF32:
Swc1(reg.fp(), dst); Swc1(reg.fp(), dst);
break; break;
case kWasmF64: case ValueType::kF64:
TurboAssembler::Sdc1(reg.fp(), dst); TurboAssembler::Sdc1(reg.fp(), dst);
break; break;
default: default:
...@@ -550,14 +550,14 @@ void LiftoffAssembler::Spill(int offset, LiftoffRegister reg, ValueType type) { ...@@ -550,14 +550,14 @@ void LiftoffAssembler::Spill(int offset, LiftoffRegister reg, ValueType type) {
void LiftoffAssembler::Spill(int offset, WasmValue value) { void LiftoffAssembler::Spill(int offset, WasmValue value) {
RecordUsedSpillOffset(offset); RecordUsedSpillOffset(offset);
MemOperand dst = liftoff::GetStackSlot(offset); MemOperand dst = liftoff::GetStackSlot(offset);
switch (value.type()) { switch (value.type().kind()) {
case kWasmI32: { case ValueType::kI32: {
LiftoffRegister tmp = GetUnusedRegister(kGpReg); LiftoffRegister tmp = GetUnusedRegister(kGpReg);
TurboAssembler::li(tmp.gp(), Operand(value.to_i32())); TurboAssembler::li(tmp.gp(), Operand(value.to_i32()));
sw(tmp.gp(), dst); sw(tmp.gp(), dst);
break; break;
} }
case kWasmI64: { case ValueType::kI64: {
LiftoffRegister tmp = GetUnusedRegister(kGpReg); LiftoffRegister tmp = GetUnusedRegister(kGpReg);
TurboAssembler::li(tmp.gp(), value.to_i64()); TurboAssembler::li(tmp.gp(), value.to_i64());
sd(tmp.gp(), dst); sd(tmp.gp(), dst);
...@@ -572,17 +572,17 @@ void LiftoffAssembler::Spill(int offset, WasmValue value) { ...@@ -572,17 +572,17 @@ void LiftoffAssembler::Spill(int offset, WasmValue value) {
void LiftoffAssembler::Fill(LiftoffRegister reg, int offset, ValueType type) { void LiftoffAssembler::Fill(LiftoffRegister reg, int offset, ValueType type) {
MemOperand src = liftoff::GetStackSlot(offset); MemOperand src = liftoff::GetStackSlot(offset);
switch (type) { switch (type.kind()) {
case kWasmI32: case ValueType::kI32:
Lw(reg.gp(), src); Lw(reg.gp(), src);
break; break;
case kWasmI64: case ValueType::kI64:
Ld(reg.gp(), src); Ld(reg.gp(), src);
break; break;
case kWasmF32: case ValueType::kF32:
Lwc1(reg.fp(), src); Lwc1(reg.fp(), src);
break; break;
case kWasmF64: case ValueType::kF64:
TurboAssembler::Ldc1(reg.fp(), src); TurboAssembler::Ldc1(reg.fp(), src);
break; break;
default: default:
...@@ -1572,7 +1572,7 @@ void LiftoffAssembler::CallC(const wasm::FunctionSig* sig, ...@@ -1572,7 +1572,7 @@ void LiftoffAssembler::CallC(const wasm::FunctionSig* sig,
int arg_bytes = 0; int arg_bytes = 0;
for (ValueType param_type : sig->parameters()) { for (ValueType param_type : sig->parameters()) {
liftoff::Store(this, sp, arg_bytes, *args++, param_type); liftoff::Store(this, sp, arg_bytes, *args++, param_type);
arg_bytes += ValueTypes::MemSize(param_type); arg_bytes += param_type.element_size_bytes();
} }
DCHECK_LE(arg_bytes, stack_bytes); DCHECK_LE(arg_bytes, stack_bytes);
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment