[iwyu|arm] Pre-work for removing unallowed include macro-assembler.h -> assembler-inl.h

The x64 side is included in https://chromium-review.googlesource.com/c/444226/

BUG=v8:5294

Change-Id: Ie255604c5e38c72e3c2b76e1ca3557a5fde108ee
Reviewed-on: https://chromium-review.googlesource.com/446394Reviewed-by: Michael Starzinger <mstarzinger@chromium.org>
Reviewed-by: Benedikt Meurer <bmeurer@chromium.org>
Reviewed-by: Yang Guo <yangguo@chromium.org>
Commit-Queue: Marja Hölttä <marja@chromium.org>
Cr-Commit-Position: refs/heads/master@{#43481}

src/arm/assembler-arm-inl.h

@@ -188,9 +188,6 @@ void RelocInfo::set_target_cell(Cell* cell,
 }
 
 
-static const int kNoCodeAgeSequenceLength = 3 * Assembler::kInstrSize;
-
-
 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) {
   UNREACHABLE();  // This should never be reached on Arm.
   return Handle<Object>();
@@ -299,6 +296,7 @@ Operand::Operand(int32_t immediate, RelocInfo::Mode rmode)  {
   rmode_ = rmode;
 }
 
+Operand Operand::Zero() { return Operand(static_cast<int32_t>(0)); }
 
 Operand::Operand(const ExternalReference& f)  {
   rm_ = no_reg;
@@ -322,14 +320,6 @@ Operand::Operand(Register rm) {
 }
 
 
-bool Operand::is_reg() const {
-  return rm_.is_valid() &&
-         rs_.is(no_reg) &&
-         shift_op_ == LSL &&
-         shift_imm_ == 0;
-}
-
-
 void Assembler::CheckBuffer() {
   if (buffer_space() <= kGap) {
     GrowBuffer();
@@ -602,6 +592,8 @@ void Assembler::set_target_address_at(Isolate* isolate, Address pc, Code* code,
   set_target_address_at(isolate, pc, constant_pool, target, icache_flush_mode);
 }
 
+EnsureSpace::EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); }
+
 }  // namespace internal
 }  // namespace v8
 

src/arm/assembler-arm.cc

@@ -39,9 +39,11 @@
 #if V8_TARGET_ARCH_ARM
 
 #include "src/arm/assembler-arm-inl.h"
+#include "src/assembler-inl.h"
 #include "src/base/bits.h"
 #include "src/base/cpu.h"
 #include "src/macro-assembler.h"
+#include "src/objects-inl.h"
 
 namespace v8 {
 namespace internal {
@@ -1523,6 +1525,10 @@ void Assembler::sub(Register dst, Register src1, const Operand& src2,
   addrmod1(cond | SUB | s, src1, dst, src2);
 }
 
+void Assembler::sub(Register dst, Register src1, Register src2, SBit s,
+                    Condition cond) {
+  sub(dst, src1, Operand(src2), s, cond);
+}
 
 void Assembler::rsb(Register dst, Register src1, const Operand& src2,
                     SBit s, Condition cond) {
@@ -1535,6 +1541,10 @@ void Assembler::add(Register dst, Register src1, const Operand& src2,
   addrmod1(cond | ADD | s, src1, dst, src2);
 }
 
+void Assembler::add(Register dst, Register src1, Register src2, SBit s,
+                    Condition cond) {
+  add(dst, src1, Operand(src2), s, cond);
+}
 
 void Assembler::adc(Register dst, Register src1, const Operand& src2,
                     SBit s, Condition cond) {
@@ -1558,6 +1568,9 @@ void Assembler::tst(Register src1, const Operand& src2, Condition cond) {
   addrmod1(cond | TST | S, src1, r0, src2);
 }
 
+void Assembler::tst(Register src1, Register src2, Condition cond) {
+  tst(src1, Operand(src2), cond);
+}
 
 void Assembler::teq(Register src1, const Operand& src2, Condition cond) {
   addrmod1(cond | TEQ | S, src1, r0, src2);
@@ -1568,6 +1581,9 @@ void Assembler::cmp(Register src1, const Operand& src2, Condition cond) {
   addrmod1(cond | CMP | S, src1, r0, src2);
 }
 
+void Assembler::cmp(Register src1, Register src2, Condition cond) {
+  cmp(src1, Operand(src2), cond);
+}
 
 void Assembler::cmp_raw_immediate(
     Register src, int raw_immediate, Condition cond) {
@@ -1586,6 +1602,10 @@ void Assembler::orr(Register dst, Register src1, const Operand& src2,
   addrmod1(cond | ORR | s, src1, dst, src2);
 }
 
+void Assembler::orr(Register dst, Register src1, Register src2, SBit s,
+                    Condition cond) {
+  orr(dst, src1, Operand(src2), s, cond);
+}
 
 void Assembler::mov(Register dst, const Operand& src, SBit s, Condition cond) {
   // Don't allow nop instructions in the form mov rn, rn to be generated using
@@ -1595,6 +1615,9 @@ void Assembler::mov(Register dst, const Operand& src, SBit s, Condition cond) {
   addrmod1(cond | MOV | s, r0, dst, src);
 }
 
+void Assembler::mov(Register dst, Register src, SBit s, Condition cond) {
+  mov(dst, Operand(src), s, cond);
+}
 
 void Assembler::mov_label_offset(Register dst, Label* label) {
   if (label->is_bound()) {
@@ -1657,6 +1680,32 @@ void Assembler::mvn(Register dst, const Operand& src, SBit s, Condition cond) {
   addrmod1(cond | MVN | s, r0, dst, src);
 }
 
+void Assembler::asr(Register dst, Register src1, const Operand& src2, SBit s,
+                    Condition cond) {
+  if (src2.is_reg()) {
+    mov(dst, Operand(src1, ASR, src2.rm()), s, cond);
+  } else {
+    mov(dst, Operand(src1, ASR, src2.immediate()), s, cond);
+  }
+}
+
+void Assembler::lsl(Register dst, Register src1, const Operand& src2, SBit s,
+                    Condition cond) {
+  if (src2.is_reg()) {
+    mov(dst, Operand(src1, LSL, src2.rm()), s, cond);
+  } else {
+    mov(dst, Operand(src1, LSL, src2.immediate()), s, cond);
+  }
+}
+
+void Assembler::lsr(Register dst, Register src1, const Operand& src2, SBit s,
+                    Condition cond) {
+  if (src2.is_reg()) {
+    mov(dst, Operand(src1, LSR, src2.rm()), s, cond);
+  } else {
+    mov(dst, Operand(src1, LSR, src2.immediate()), s, cond);
+  }
+}
 
 // Multiply instructions.
 void Assembler::mla(Register dst, Register src1, Register src2, Register srcA,
@@ -4690,6 +4739,7 @@ void Assembler::nop(int type) {
   emit(al | 13*B21 | type*B12 | type);
 }
 
+void Assembler::pop() { add(sp, sp, Operand(kPointerSize)); }
 
 bool Assembler::IsMovT(Instr instr) {
   instr &= ~(((kNumberOfConditions - 1) << 28) |  // Mask off conditions

src/arm/assembler-arm.h

@@ -492,9 +492,7 @@ class Operand BASE_EMBEDDED {
   // immediate
   INLINE(explicit Operand(int32_t immediate,
          RelocInfo::Mode rmode = RelocInfo::NONE32));
-  INLINE(static Operand Zero()) {
-    return Operand(static_cast<int32_t>(0));
-  }
+  INLINE(static Operand Zero());
   INLINE(explicit Operand(const ExternalReference& f));
   explicit Operand(Handle<Object> handle);
   INLINE(explicit Operand(Smi* value));
@@ -520,7 +518,12 @@ class Operand BASE_EMBEDDED {
   explicit Operand(Register rm, ShiftOp shift_op, Register rs);
 
   // Return true if this is a register operand.
-  INLINE(bool is_reg() const);
+  INLINE(bool is_reg() const) {
+    return rm_.is_valid() &&
+        rs_.is(no_reg) &&
+        shift_op_ == LSL &&
+        shift_imm_ == 0;
+  }
 
   // Return the number of actual instructions required to implement the given
   // instruction for this particular operand. This can be a single instruction,
@@ -814,9 +817,7 @@ class Assembler : public AssemblerBase {
   void sub(Register dst, Register src1, const Operand& src2,
            SBit s = LeaveCC, Condition cond = al);
   void sub(Register dst, Register src1, Register src2,
-           SBit s = LeaveCC, Condition cond = al) {
-    sub(dst, src1, Operand(src2), s, cond);
-  }
+           SBit s = LeaveCC, Condition cond = al);
 
   void rsb(Register dst, Register src1, const Operand& src2,
            SBit s = LeaveCC, Condition cond = al);
@@ -824,9 +825,7 @@ class Assembler : public AssemblerBase {
   void add(Register dst, Register src1, const Operand& src2,
            SBit s = LeaveCC, Condition cond = al);
   void add(Register dst, Register src1, Register src2,
-           SBit s = LeaveCC, Condition cond = al) {
-    add(dst, src1, Operand(src2), s, cond);
-  }
+           SBit s = LeaveCC, Condition cond = al);
 
   void adc(Register dst, Register src1, const Operand& src2,
            SBit s = LeaveCC, Condition cond = al);
@@ -838,16 +837,13 @@ class Assembler : public AssemblerBase {
            SBit s = LeaveCC, Condition cond = al);
 
   void tst(Register src1, const Operand& src2, Condition cond = al);
-  void tst(Register src1, Register src2, Condition cond = al) {
-    tst(src1, Operand(src2), cond);
-  }
+  void tst(Register src1, Register src2, Condition cond = al);
 
   void teq(Register src1, const Operand& src2, Condition cond = al);
 
   void cmp(Register src1, const Operand& src2, Condition cond = al);
-  void cmp(Register src1, Register src2, Condition cond = al) {
-    cmp(src1, Operand(src2), cond);
-  }
+  void cmp(Register src1, Register src2, Condition cond = al);
+
   void cmp_raw_immediate(Register src1, int raw_immediate, Condition cond = al);
 
   void cmn(Register src1, const Operand& src2, Condition cond = al);
@@ -855,15 +851,11 @@ class Assembler : public AssemblerBase {
   void orr(Register dst, Register src1, const Operand& src2,
            SBit s = LeaveCC, Condition cond = al);
   void orr(Register dst, Register src1, Register src2,
-           SBit s = LeaveCC, Condition cond = al) {
-    orr(dst, src1, Operand(src2), s, cond);
-  }
+           SBit s = LeaveCC, Condition cond = al);
 
   void mov(Register dst, const Operand& src,
            SBit s = LeaveCC, Condition cond = al);
-  void mov(Register dst, Register src, SBit s = LeaveCC, Condition cond = al) {
-    mov(dst, Operand(src), s, cond);
-  }
+  void mov(Register dst, Register src, SBit s = LeaveCC, Condition cond = al);
 
   // Load the position of the label relative to the generated code object
   // pointer in a register.
@@ -883,31 +875,13 @@ class Assembler : public AssemblerBase {
   // Shift instructions
 
   void asr(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
-           Condition cond = al) {
-    if (src2.is_reg()) {
-      mov(dst, Operand(src1, ASR, src2.rm()), s, cond);
-    } else {
-      mov(dst, Operand(src1, ASR, src2.immediate()), s, cond);
-    }
-  }
+           Condition cond = al);
 
   void lsl(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
-           Condition cond = al) {
-    if (src2.is_reg()) {
-      mov(dst, Operand(src1, LSL, src2.rm()), s, cond);
-    } else {
-      mov(dst, Operand(src1, LSL, src2.immediate()), s, cond);
-    }
-  }
+           Condition cond = al);
 
   void lsr(Register dst, Register src1, const Operand& src2, SBit s = LeaveCC,
-           Condition cond = al) {
-    if (src2.is_reg()) {
-      mov(dst, Operand(src1, LSR, src2.rm()), s, cond);
-    } else {
-      mov(dst, Operand(src1, LSR, src2.immediate()), s, cond);
-    }
-  }
+           Condition cond = al);
 
   // Multiply instructions
 
@@ -1443,9 +1417,7 @@ class Assembler : public AssemblerBase {
     ldr(dst, MemOperand(sp, 4, PostIndex), cond);
   }
 
-  void pop() {
-    add(sp, sp, Operand(kPointerSize));
-  }
+  void pop();
 
   void vpush(DwVfpRegister src, Condition cond = al) {
     vstm(db_w, sp, src, src, cond);
@@ -1808,12 +1780,11 @@ class Assembler : public AssemblerBase {
   friend class EnsureSpace;
 };
 
+static const int kNoCodeAgeSequenceLength = 3 * Assembler::kInstrSize;
 
 class EnsureSpace BASE_EMBEDDED {
  public:
-  explicit EnsureSpace(Assembler* assembler) {
-    assembler->CheckBuffer();
-  }
+  INLINE(explicit EnsureSpace(Assembler* assembler));
 };
 
 

src/arm/code-stubs-arm.cc

@@ -5,14 +5,19 @@
 #if V8_TARGET_ARCH_ARM
 
 #include "src/code-stubs.h"
+
 #include "src/api-arguments.h"
+#include "src/assembler-inl.h"
 #include "src/base/bits.h"
 #include "src/bootstrapper.h"
 #include "src/codegen.h"
+#include "src/counters.h"
+#include "src/heap/heap-inl.h"
 #include "src/ic/handler-compiler.h"
 #include "src/ic/ic.h"
 #include "src/ic/stub-cache.h"
 #include "src/isolate.h"
+#include "src/objects/regexp-match-info.h"
 #include "src/regexp/jsregexp.h"
 #include "src/regexp/regexp-macro-assembler.h"
 #include "src/runtime/runtime.h"
@@ -2566,6 +2571,9 @@ void RecordWriteStub::InformIncrementalMarker(MacroAssembler* masm) {
   regs_.RestoreCallerSaveRegisters(masm, save_fp_regs_mode());
 }
 
+void RecordWriteStub::Activate(Code* code) {
+  code->GetHeap()->incremental_marking()->ActivateGeneratedStub(code);
+}
 
 void RecordWriteStub::CheckNeedsToInformIncrementalMarker(
     MacroAssembler* masm,

src/arm/code-stubs-arm.h

@@ -197,9 +197,7 @@ class RecordWriteStub: public PlatformCodeStub {
       Mode mode);
   void InformIncrementalMarker(MacroAssembler* masm);
 
-  void Activate(Code* code) override {
-    code->GetHeap()->incremental_marking()->ActivateGeneratedStub(code);
-  }
+  void Activate(Code* code) override;
 
   Register object() const {
     return Register::from_code(ObjectBits::decode(minor_key_));

src/arm/codegen-arm.cc

@@ -8,6 +8,7 @@
 
 #include <memory>
 
+#include "src/arm/assembler-arm-inl.h"
 #include "src/arm/simulator-arm.h"
 #include "src/codegen.h"
 #include "src/macro-assembler.h"

src/arm/deoptimizer-arm.cc

@@ -2,9 +2,11 @@
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
+#include "src/assembler-inl.h"
 #include "src/codegen.h"
 #include "src/deoptimizer.h"
 #include "src/full-codegen/full-codegen.h"
+#include "src/objects-inl.h"
 #include "src/register-configuration.h"
 #include "src/safepoint-table.h"
 

src/arm/macro-assembler-arm.cc

@@ -6,11 +6,14 @@
 
 #if V8_TARGET_ARCH_ARM
 
+#include "src/assembler-inl.h"
 #include "src/base/bits.h"
 #include "src/base/division-by-constant.h"
 #include "src/bootstrapper.h"
 #include "src/codegen.h"
+#include "src/counters.h"
 #include "src/debug/debug.h"
+#include "src/objects-inl.h"
 #include "src/register-configuration.h"
 #include "src/runtime/runtime.h"
 
@@ -238,6 +241,9 @@ void MacroAssembler::Push(Handle<Object> handle) {
   push(ip);
 }
 
+void MacroAssembler::Push(Smi* smi) { Push(Handle<Smi>(smi, isolate())); }
+
+void MacroAssembler::Move(Register dst, Smi* smi) { mov(dst, Operand(smi)); }
 
 void MacroAssembler::Move(Register dst, Handle<Object> value) {
   mov(dst, Operand(value));
@@ -1894,6 +1900,14 @@ void MacroAssembler::IsObjectJSStringType(Register object,
   b(ne, fail);
 }
 
+Condition MacroAssembler::IsObjectStringType(Register obj, Register type,
+                                             Condition cond) {
+  ldr(type, FieldMemOperand(obj, HeapObject::kMapOffset), cond);
+  ldrb(type, FieldMemOperand(type, Map::kInstanceTypeOffset), cond);
+  tst(type, Operand(kIsNotStringMask), cond);
+  DCHECK_EQ(0u, kStringTag);
+  return eq;
+}
 
 void MacroAssembler::IsObjectNameType(Register object,
                                       Register scratch,
@@ -2813,6 +2827,11 @@ void MacroAssembler::LoadGlobalFunctionInitialMap(Register function,
   }
 }
 
+void MacroAssembler::InitializeRootRegister() {
+  ExternalReference roots_array_start =
+      ExternalReference::roots_array_start(isolate());
+  mov(kRootRegister, Operand(roots_array_start));
+}
 
 void MacroAssembler::JumpIfNotPowerOfTwoOrZero(
     Register reg,
@@ -2836,6 +2855,13 @@ void MacroAssembler::JumpIfNotPowerOfTwoOrZeroAndNeg(
   b(ne, not_power_of_two);
 }
 
+void MacroAssembler::SmiTag(Register reg, SBit s) {
+  add(reg, reg, Operand(reg), s);
+}
+
+void MacroAssembler::SmiTag(Register dst, Register src, SBit s) {
+  add(dst, src, Operand(src), s);
+}
 
 void MacroAssembler::JumpIfNotBothSmi(Register reg1,
                                       Register reg2,
@@ -2854,6 +2880,24 @@ void MacroAssembler::UntagAndJumpIfSmi(
   b(cc, smi_case);  // Shifter carry is not set for a smi.
 }
 
+void MacroAssembler::SmiTst(Register value) {
+  tst(value, Operand(kSmiTagMask));
+}
+
+void MacroAssembler::NonNegativeSmiTst(Register value) {
+  tst(value, Operand(kSmiTagMask | kSmiSignMask));
+}
+
+void MacroAssembler::JumpIfSmi(Register value, Label* smi_label) {
+  tst(value, Operand(kSmiTagMask));
+  b(eq, smi_label);
+}
+
+void MacroAssembler::JumpIfNotSmi(Register value, Label* not_smi_label) {
+  tst(value, Operand(kSmiTagMask));
+  b(ne, not_smi_label);
+}
+
 void MacroAssembler::JumpIfEitherSmi(Register reg1,
                                      Register reg2,
                                      Label* on_either_smi) {
@@ -3615,6 +3659,22 @@ void MacroAssembler::LoadAccessor(Register dst, Register holder,
   ldr(dst, FieldMemOperand(dst, offset));
 }
 
+template <typename Field>
+void MacroAssembler::DecodeFieldToSmi(Register dst, Register src) {
+  static const int shift = Field::kShift;
+  static const int mask = Field::kMask >> shift << kSmiTagSize;
+  STATIC_ASSERT((mask & (0x80000000u >> (kSmiTagSize - 1))) == 0);
+  STATIC_ASSERT(kSmiTag == 0);
+  if (shift < kSmiTagSize) {
+    mov(dst, Operand(src, LSL, kSmiTagSize - shift));
+    and_(dst, dst, Operand(mask));
+  } else if (shift > kSmiTagSize) {
+    mov(dst, Operand(src, LSR, shift - kSmiTagSize));
+    and_(dst, dst, Operand(mask));
+  } else {
+    and_(dst, src, Operand(mask));
+  }
+}
 
 void MacroAssembler::CheckEnumCache(Label* call_runtime) {
   Register null_value = r5;

src/arm/macro-assembler-arm.h

@@ -5,6 +5,7 @@
 #ifndef V8_ARM_MACRO_ASSEMBLER_ARM_H_
 #define V8_ARM_MACRO_ASSEMBLER_ARM_H_
 
+#include "src/arm/assembler-arm.h"
 #include "src/assembler.h"
 #include "src/bailout-reason.h"
 #include "src/frames.h"
@@ -173,7 +174,7 @@ class MacroAssembler: public Assembler {
   void Pop(Register dst) { pop(dst); }
 
   // Register move. May do nothing if the registers are identical.
-  void Move(Register dst, Smi* smi) { mov(dst, Operand(smi)); }
+  void Move(Register dst, Smi* smi);
   void Move(Register dst, Handle<Object> value);
   void Move(Register dst, Register src, Condition cond = al);
   void Move(Register dst, const Operand& src, SBit sbit = LeaveCC,
@@ -331,7 +332,7 @@ class MacroAssembler: public Assembler {
 
   // Push a handle.
   void Push(Handle<Object> handle);
-  void Push(Smi* smi) { Push(Handle<Smi>(smi, isolate())); }
+  void Push(Smi* smi);
 
   // Push two registers.  Pushes leftmost register first (to highest address).
   void Push(Register src1, Register src2, Condition cond = al) {
@@ -657,11 +658,7 @@ class MacroAssembler: public Assembler {
                                     Register map,
                                     Register scratch);
 
-  void InitializeRootRegister() {
-    ExternalReference roots_array_start =
-        ExternalReference::roots_array_start(isolate());
-    mov(kRootRegister, Operand(roots_array_start));
-  }
+  void InitializeRootRegister();
 
   // ---------------------------------------------------------------------------
   // JavaScript invokes
@@ -926,16 +923,8 @@ class MacroAssembler: public Assembler {
   // Returns a condition that will be enabled if the object was a string
   // and the passed-in condition passed. If the passed-in condition failed
   // then flags remain unchanged.
-  Condition IsObjectStringType(Register obj,
-                               Register type,
-                               Condition cond = al) {
-    ldr(type, FieldMemOperand(obj, HeapObject::kMapOffset), cond);
-    ldrb(type, FieldMemOperand(type, Map::kInstanceTypeOffset), cond);
-    tst(type, Operand(kIsNotStringMask), cond);
-    DCHECK_EQ(0u, kStringTag);
-    return eq;
-  }
-
+  Condition IsObjectStringType(Register obj, Register type,
+                               Condition cond = al);
 
   // Get the number of least significant bits from a register
   void GetLeastBitsFromSmi(Register dst, Register src, int num_least_bits);
@@ -1200,12 +1189,8 @@ class MacroAssembler: public Assembler {
   // ---------------------------------------------------------------------------
   // Smi utilities
 
-  void SmiTag(Register reg, SBit s = LeaveCC) {
-    add(reg, reg, Operand(reg), s);
-  }
-  void SmiTag(Register dst, Register src, SBit s = LeaveCC) {
-    add(dst, src, Operand(src), s);
-  }
+  void SmiTag(Register reg, SBit s = LeaveCC);
+  void SmiTag(Register dst, Register src, SBit s = LeaveCC);
 
   // Try to convert int32 to smi. If the value is to large, preserve
   // the original value and jump to not_a_smi. Destroys scratch and
@@ -1232,22 +1217,12 @@ class MacroAssembler: public Assembler {
   void UntagAndJumpIfSmi(Register dst, Register src, Label* smi_case);
 
   // Test if the register contains a smi (Z == 0 (eq) if true).
-  inline void SmiTst(Register value) {
-    tst(value, Operand(kSmiTagMask));
-  }
-  inline void NonNegativeSmiTst(Register value) {
-    tst(value, Operand(kSmiTagMask | kSmiSignMask));
-  }
+  void SmiTst(Register value);
+  void NonNegativeSmiTst(Register value);
   // Jump if the register contains a smi.
-  inline void JumpIfSmi(Register value, Label* smi_label) {
-    tst(value, Operand(kSmiTagMask));
-    b(eq, smi_label);
-  }
+  void JumpIfSmi(Register value, Label* smi_label);
   // Jump if either of the registers contain a non-smi.
-  inline void JumpIfNotSmi(Register value, Label* not_smi_label) {
-    tst(value, Operand(kSmiTagMask));
-    b(ne, not_smi_label);
-  }
+  void JumpIfNotSmi(Register value, Label* not_smi_label);
   // Jump if either of the registers contain a non-smi.
   void JumpIfNotBothSmi(Register reg1, Register reg2, Label* on_not_both_smi);
   // Jump if either of the registers contain a smi.
@@ -1351,22 +1326,8 @@ class MacroAssembler: public Assembler {
     DecodeField<Field>(reg, reg);
   }
 
-  template<typename Field>
-  void DecodeFieldToSmi(Register dst, Register src) {
-    static const int shift = Field::kShift;
-    static const int mask = Field::kMask >> shift << kSmiTagSize;
-    STATIC_ASSERT((mask & (0x80000000u >> (kSmiTagSize - 1))) == 0);
-    STATIC_ASSERT(kSmiTag == 0);
-    if (shift < kSmiTagSize) {
-      mov(dst, Operand(src, LSL, kSmiTagSize - shift));
-      and_(dst, dst, Operand(mask));
-    } else if (shift > kSmiTagSize) {
-      mov(dst, Operand(src, LSR, shift - kSmiTagSize));
-      and_(dst, dst, Operand(mask));
-    } else {
-      and_(dst, src, Operand(mask));
-    }
-  }
+  template <typename Field>
+  void DecodeFieldToSmi(Register dst, Register src);
 
   template<typename Field>
   void DecodeFieldToSmi(Register reg) {

src/arm/simulator-arm.cc

@@ -10,10 +10,11 @@
 
 #include "src/arm/constants-arm.h"
 #include "src/arm/simulator-arm.h"
-#include "src/assembler.h"
+#include "src/assembler-inl.h"
 #include "src/base/bits.h"
 #include "src/codegen.h"
 #include "src/disasm.h"
+#include "src/objects-inl.h"
 #include "src/runtime/runtime-utils.h"
 
 #if defined(USE_SIMULATOR)

src/builtins/arm/builtins-arm.cc

@@ -4,10 +4,13 @@
 
 #if V8_TARGET_ARCH_ARM
 
+#include "src/assembler-inl.h"
 #include "src/codegen.h"
+#include "src/counters.h"
 #include "src/debug/debug.h"
 #include "src/deoptimizer.h"
 #include "src/full-codegen/full-codegen.h"
+#include "src/objects-inl.h"
 #include "src/runtime/runtime.h"
 
 namespace v8 {

src/compiler/arm/code-generator-arm.cc

@@ -5,11 +5,13 @@
 #include "src/compiler/code-generator.h"
 
 #include "src/arm/macro-assembler-arm.h"
+#include "src/assembler-inl.h"
 #include "src/compilation-info.h"
 #include "src/compiler/code-generator-impl.h"
 #include "src/compiler/gap-resolver.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/osr.h"
+#include "src/heap/heap-inl.h"
 
 namespace v8 {
 namespace internal {

src/crankshaft/arm/lithium-arm.cc

@@ -9,6 +9,7 @@
 #include "src/crankshaft/arm/lithium-codegen-arm.h"
 #include "src/crankshaft/hydrogen-osr.h"
 #include "src/crankshaft/lithium-inl.h"
+#include "src/objects-inl.h"
 
 namespace v8 {
 namespace internal {

src/crankshaft/arm/lithium-codegen-arm.cc

@@ -4,6 +4,7 @@
 
 #include "src/crankshaft/arm/lithium-codegen-arm.h"
 
+#include "src/assembler-inl.h"
 #include "src/base/bits.h"
 #include "src/builtins/builtins-constructor.h"
 #include "src/code-factory.h"
@@ -12,6 +13,7 @@
 #include "src/crankshaft/hydrogen-osr.h"
 #include "src/ic/ic.h"
 #include "src/ic/stub-cache.h"
+#include "src/objects-inl.h"
 
 namespace v8 {
 namespace internal {

src/crankshaft/arm/lithium-gap-resolver-arm.cc

@@ -2,8 +2,10 @@
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
-#include "src/crankshaft/arm/lithium-codegen-arm.h"
 #include "src/crankshaft/arm/lithium-gap-resolver-arm.h"
+#include "src/assembler-inl.h"
+#include "src/crankshaft/arm/lithium-codegen-arm.h"
+#include "src/objects-inl.h"
 
 namespace v8 {
 namespace internal {

src/debug/arm/debug-arm.cc

@@ -6,8 +6,10 @@
 
 #include "src/debug/debug.h"
 
+#include "src/assembler-inl.h"
 #include "src/codegen.h"
 #include "src/debug/liveedit.h"
+#include "src/objects-inl.h"
 
 namespace v8 {
 namespace internal {

src/full-codegen/arm/full-codegen-arm.cc

@@ -4,6 +4,7 @@
 
 #if V8_TARGET_ARCH_ARM
 
+#include "src/assembler-inl.h"
 #include "src/ast/compile-time-value.h"
 #include "src/ast/scopes.h"
 #include "src/builtins/builtins-constructor.h"
@@ -14,7 +15,9 @@
 #include "src/compiler.h"
 #include "src/debug/debug.h"
 #include "src/full-codegen/full-codegen.h"
+#include "src/heap/heap-inl.h"
 #include "src/ic/ic.h"
+#include "src/objects-inl.h"
 
 #include "src/arm/code-stubs-arm.h"
 #include "src/arm/macro-assembler-arm.h"

src/handles-inl.h

@@ -33,6 +33,8 @@ HandleScope::HandleScope(Isolate* isolate) {
   data->level++;
 }
 
+template <typename T>
+Handle<T>::Handle(T* object, Isolate* isolate) : HandleBase(object, isolate) {}
 
 template <typename T>
 inline std::ostream& operator<<(std::ostream& os, Handle<T> handle) {

src/handles.h

@@ -98,7 +98,7 @@ class Handle final : public HandleBase {
   }
 
   V8_INLINE explicit Handle(T* object) : Handle(object, object->GetIsolate()) {}
-  V8_INLINE Handle(T* object, Isolate* isolate) : HandleBase(object, isolate) {}
+  V8_INLINE Handle(T* object, Isolate* isolate);
 
   // Allocate a new handle for the object, do not canonicalize.
   V8_INLINE static Handle<T> New(T* object, Isolate* isolate);

src/ic/arm/access-compiler-arm.cc

@@ -6,6 +6,8 @@
 
 #include "src/ic/access-compiler.h"
 
+#include "src/objects-inl.h"
+
 namespace v8 {
 namespace internal {
 

src/ic/arm/handler-compiler-arm.cc

@@ -7,6 +7,7 @@
 #include "src/ic/handler-compiler.h"
 
 #include "src/api-arguments.h"
+#include "src/assembler-inl.h"
 #include "src/field-type.h"
 #include "src/ic/call-optimization.h"
 #include "src/ic/ic.h"

src/ic/arm/ic-arm.cc

@@ -4,9 +4,11 @@
 
 #if V8_TARGET_ARCH_ARM
 
+#include "src/assembler-inl.h"
 #include "src/codegen.h"
 #include "src/ic/ic.h"
 #include "src/ic/stub-cache.h"
+#include "src/objects-inl.h"
 
 namespace v8 {
 namespace internal {

src/interpreter/bytecode-decoder.cc

@@ -7,6 +7,7 @@
 #include <iomanip>
 
 #include "src/interpreter/interpreter-intrinsics.h"
+#include "src/objects-inl.h"
 
 namespace v8 {
 namespace internal {

src/regexp/arm/regexp-macro-assembler-arm.cc

@@ -6,9 +6,12 @@
 
 #include "src/regexp/arm/regexp-macro-assembler-arm.h"
 
+#include "src/assembler-inl.h"
 #include "src/code-stubs.h"
+#include "src/factory.h"
 #include "src/log.h"
 #include "src/macro-assembler.h"
+#include "src/objects-inl.h"
 #include "src/regexp/regexp-macro-assembler.h"
 #include "src/regexp/regexp-stack.h"
 #include "src/unicode.h"

test/cctest/test-assembler-arm.cc

@@ -27,15 +27,15 @@
 
 #include <iostream>  // NOLINT(readability/streams)
 
-#include "src/v8.h"
-#include "test/cctest/cctest.h"
-
 #include "src/arm/simulator-arm.h"
+#include "src/assembler-inl.h"
 #include "src/base/utils/random-number-generator.h"
 #include "src/disassembler.h"
 #include "src/factory.h"
 #include "src/macro-assembler.h"
 #include "src/ostreams.h"
+#include "src/v8.h"
+#include "test/cctest/cctest.h"
 
 using namespace v8::base;
 using namespace v8::internal;

test/cctest/test-code-stubs-arm.cc

@@ -27,13 +27,14 @@
 
 #include <stdlib.h>
 
-#include "src/v8.h"
-
+#include "src/assembler-inl.h"
 #include "src/base/platform/platform.h"
 #include "src/code-stubs.h"
 #include "src/factory.h"
 #include "src/macro-assembler.h"
+#include "src/objects-inl.h"
 #include "src/simulator.h"
+#include "src/v8.h"
 #include "test/cctest/cctest.h"
 #include "test/cctest/test-code-stubs.h"
 

test/cctest/test-disasm-arm.cc

@@ -28,12 +28,13 @@
 
 #include <stdlib.h>
 
-#include "src/v8.h"
-
+#include "src/assembler-inl.h"
 #include "src/debug/debug.h"
 #include "src/disasm.h"
 #include "src/disassembler.h"
 #include "src/macro-assembler.h"
+#include "src/objects-inl.h"
+#include "src/v8.h"
 #include "test/cctest/cctest.h"
 
 using namespace v8::internal;

test/cctest/test-hashing.cc

@@ -27,12 +27,12 @@
 
 #include <stdlib.h>
 
-#include "src/v8.h"
-
+#include "src/assembler-inl.h"
 #include "src/code-stubs.h"
 #include "src/factory.h"
 #include "src/macro-assembler.h"
 #include "src/objects-inl.h"
+#include "src/v8.h"
 #include "test/cctest/cctest.h"
 
 #ifdef USE_SIMULATOR

test/cctest/test-macro-assembler-arm.cc

@@ -27,15 +27,13 @@
 
 #include <stdlib.h>
 
+#include "src/arm/simulator-arm.h"
+#include "src/assembler-inl.h"
+#include "src/macro-assembler.h"
+#include "src/objects-inl.h"
 #include "src/v8.h"
 #include "test/cctest/cctest.h"
 
-#include "src/macro-assembler.h"
-
-#include "src/arm/macro-assembler-arm.h"
-#include "src/arm/simulator-arm.h"
-
-
 using namespace v8::internal;
 
 typedef void* (*F)(int x, int y, int p2, int p3, int p4);

test/cctest/wasm/test-wasm-interpreter-entry.cc

@@ -4,10 +4,10 @@
 
 #include <cstdint>
 
+#include "src/assembler-inl.h"
 #include "src/objects-inl.h"
 #include "src/wasm/wasm-macro-gen.h"
 #include "src/wasm/wasm-objects.h"
-
 #include "test/cctest/cctest.h"
 #include "test/cctest/compiler/value-helper.h"
 #include "test/cctest/wasm/wasm-run-utils.h"

test/unittests/compiler/arm/instruction-selector-arm-unittest.cc

@@ -6,6 +6,8 @@
 
 #include "test/unittests/compiler/instruction-selector-unittest.h"
 
+#include "src/objects-inl.h"
+
 namespace v8 {
 namespace internal {
 namespace compiler {