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Commit fc377b05 authored by Clemens Backes's avatar Clemens Backes Committed by V8 LUCI CQ
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[cleanup][codegen] Remove redundant NOLINT annotations 

cpplint rules change over time, and we change the exact rules we enable
for v8. This CL removes NOLINT annotations which are not needed
according to the currently enabled rules.

R=mslekova@chromium.org

Bug: v8:11717
Change-Id: Ic986c01ac151cee9fc6f7d950d0c4c139ebac6d8
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2859852Reviewed-by: 's avatarMaya Lekova <mslekova@chromium.org>
Commit-Queue: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#74354}
parent b82dd0b0
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Showing with 37 additions and 42 deletions
src/codegen/arm/cpu-arm.cc
View file @ fc377b05
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
#ifdef __arm__ #ifdef __arm__
#ifdef __QNXNTO__ #ifdef __QNXNTO__
#include <sys/mman.h> // for cache flushing. #include <sys/mman.h> // for cache flushing.
#undef MAP_TYPE // NOLINT #undef MAP_TYPE
#elif V8_OS_FREEBSD #elif V8_OS_FREEBSD
#include <machine/sysarch.h> // for cache flushing #include <machine/sysarch.h> // for cache flushing
#include <sys/types.h> #include <sys/types.h>
......
src/codegen/arm64/cpu-arm64.cc
View file @ fc377b05
...@@ -23,7 +23,7 @@ class CacheLineSizes { ...@@ -23,7 +23,7 @@ class CacheLineSizes {
cache_type_register_ = 0; cache_type_register_ = 0;
#else #else
// Copy the content of the cache type register to a core register. // Copy the content of the cache type register to a core register.
__asm__ __volatile__("mrs %x[ctr], ctr_el0" // NOLINT __asm__ __volatile__("mrs %x[ctr], ctr_el0"
: [ctr] "=r"(cache_type_register_)); : [ctr] "=r"(cache_type_register_));
#endif #endif
} }
...@@ -64,9 +64,8 @@ void CpuFeatures::FlushICache(void* address, size_t length) { ...@@ -64,9 +64,8 @@ void CpuFeatures::FlushICache(void* address, size_t length) {
uintptr_t istart = start & ~(isize - 1); uintptr_t istart = start & ~(isize - 1);
uintptr_t end = start + length; uintptr_t end = start + length;
__asm__ __volatile__( // NOLINT __asm__ __volatile__(
// Clean every line of the D cache containing the // Clean every line of the D cache containing the target data.
// target data.
"0: \n\t" "0: \n\t"
// dc : Data Cache maintenance // dc : Data Cache maintenance
// c : Clean // c : Clean
...@@ -111,7 +110,7 @@ void CpuFeatures::FlushICache(void* address, size_t length) { ...@@ -111,7 +110,7 @@ void CpuFeatures::FlushICache(void* address, size_t length) {
: [dsize] "r"(dsize), [isize] "r"(isize), [end] "r"(end) : [dsize] "r"(dsize), [isize] "r"(isize), [end] "r"(end)
// This code does not write to memory but without the dependency gcc might // This code does not write to memory but without the dependency gcc might
// move this code before the code is generated. // move this code before the code is generated.
: "cc", "memory"); // NOLINT : "cc", "memory");
#endif // V8_OS_WIN #endif // V8_OS_WIN
#endif // V8_HOST_ARCH_ARM64 #endif // V8_HOST_ARCH_ARM64
} }
......
src/codegen/assembler.h
View file @ fc377b05
...@@ -410,7 +410,7 @@ class V8_EXPORT_PRIVATE V8_NODISCARD CpuFeatureScope { ...@@ -410,7 +410,7 @@ class V8_EXPORT_PRIVATE V8_NODISCARD CpuFeatureScope {
#else #else
CpuFeatureScope(AssemblerBase* assembler, CpuFeature f, CpuFeatureScope(AssemblerBase* assembler, CpuFeature f,
CheckPolicy check = kCheckSupported) {} CheckPolicy check = kCheckSupported) {}
~CpuFeatureScope() { // NOLINT (modernize-use-equals-default) ~CpuFeatureScope() {
// Define a destructor to avoid unused variable warnings. // Define a destructor to avoid unused variable warnings.
} }
#endif #endif
......
src/codegen/constants-arch.h
View file @ fc377b05
...@@ -6,23 +6,23 @@ ...@@ -6,23 +6,23 @@
#define V8_CODEGEN_CONSTANTS_ARCH_H_ #define V8_CODEGEN_CONSTANTS_ARCH_H_
#if V8_TARGET_ARCH_ARM #if V8_TARGET_ARCH_ARM
#include "src/codegen/arm/constants-arm.h" // NOLINT #include "src/codegen/arm/constants-arm.h"
#elif V8_TARGET_ARCH_ARM64 #elif V8_TARGET_ARCH_ARM64
#include "src/codegen/arm64/constants-arm64.h" // NOLINT #include "src/codegen/arm64/constants-arm64.h"
#elif V8_TARGET_ARCH_IA32 #elif V8_TARGET_ARCH_IA32
#include "src/codegen/ia32/constants-ia32.h" // NOLINT #include "src/codegen/ia32/constants-ia32.h"
#elif V8_TARGET_ARCH_MIPS #elif V8_TARGET_ARCH_MIPS
#include "src/codegen/mips/constants-mips.h" // NOLINT #include "src/codegen/mips/constants-mips.h"
#elif V8_TARGET_ARCH_MIPS64 #elif V8_TARGET_ARCH_MIPS64
#include "src/codegen/mips64/constants-mips64.h" // NOLINT #include "src/codegen/mips64/constants-mips64.h"
#elif V8_TARGET_ARCH_PPC || V8_TARGET_ARCH_PPC64 #elif V8_TARGET_ARCH_PPC || V8_TARGET_ARCH_PPC64
#include "src/codegen/ppc/constants-ppc.h" // NOLINT #include "src/codegen/ppc/constants-ppc.h"
#elif V8_TARGET_ARCH_S390 #elif V8_TARGET_ARCH_S390
#include "src/codegen/s390/constants-s390.h" // NOLINT #include "src/codegen/s390/constants-s390.h"
#elif V8_TARGET_ARCH_X64 #elif V8_TARGET_ARCH_X64
#include "src/codegen/x64/constants-x64.h" // NOLINT #include "src/codegen/x64/constants-x64.h"
#elif V8_TARGET_ARCH_RISCV64 #elif V8_TARGET_ARCH_RISCV64
#include "src/codegen/riscv64/constants-riscv64.h" // NOLINT #include "src/codegen/riscv64/constants-riscv64.h"
#else #else
#error Unsupported target architecture. #error Unsupported target architecture.
#endif #endif
......
src/codegen/handler-table.h
View file @ fc377b05
...@@ -97,8 +97,8 @@ class V8_EXPORT_PRIVATE HandlerTable { ...@@ -97,8 +97,8 @@ class V8_EXPORT_PRIVATE HandlerTable {
int NumberOfReturnEntries() const; int NumberOfReturnEntries() const;
#ifdef ENABLE_DISASSEMBLER #ifdef ENABLE_DISASSEMBLER
void HandlerTableRangePrint(std::ostream& os); // NOLINT void HandlerTableRangePrint(std::ostream& os);
void HandlerTableReturnPrint(std::ostream& os); // NOLINT void HandlerTableReturnPrint(std::ostream& os);
#endif #endif
private: private:
......
src/codegen/mips/assembler-mips.cc
View file @ fc377b05
...@@ -261,29 +261,27 @@ static const int kNegOffset = 0x00008000; ...@@ -261,29 +261,27 @@ static const int kNegOffset = 0x00008000;
// operations as post-increment of sp. // operations as post-increment of sp.
const Instr kPopInstruction = ADDIU | (sp.code() << kRsShift) | const Instr kPopInstruction = ADDIU | (sp.code() << kRsShift) |
(sp.code() << kRtShift) | (sp.code() << kRtShift) |
(kPointerSize & kImm16Mask); // NOLINT (kPointerSize & kImm16Mask);
// addiu(sp, sp, -4) part of Push(r) operation as pre-decrement of sp. // addiu(sp, sp, -4) part of Push(r) operation as pre-decrement of sp.
const Instr kPushInstruction = ADDIU | (sp.code() << kRsShift) | const Instr kPushInstruction = ADDIU | (sp.code() << kRsShift) |
(sp.code() << kRtShift) | (sp.code() << kRtShift) |
(-kPointerSize & kImm16Mask); // NOLINT (-kPointerSize & kImm16Mask);
// sw(r, MemOperand(sp, 0)) // sw(r, MemOperand(sp, 0))
const Instr kPushRegPattern = const Instr kPushRegPattern = SW | (sp.code() << kRsShift) | (0 & kImm16Mask);
SW | (sp.code() << kRsShift) | (0 & kImm16Mask); // NOLINT
// lw(r, MemOperand(sp, 0)) // lw(r, MemOperand(sp, 0))
const Instr kPopRegPattern = const Instr kPopRegPattern = LW | (sp.code() << kRsShift) | (0 & kImm16Mask);
LW | (sp.code() << kRsShift) | (0 & kImm16Mask); // NOLINT
const Instr kLwRegFpOffsetPattern = const Instr kLwRegFpOffsetPattern =
LW | (fp.code() << kRsShift) | (0 & kImm16Mask); // NOLINT LW | (fp.code() << kRsShift) | (0 & kImm16Mask);
const Instr kSwRegFpOffsetPattern = const Instr kSwRegFpOffsetPattern =
SW | (fp.code() << kRsShift) | (0 & kImm16Mask); // NOLINT SW | (fp.code() << kRsShift) | (0 & kImm16Mask);
const Instr kLwRegFpNegOffsetPattern = const Instr kLwRegFpNegOffsetPattern =
LW | (fp.code() << kRsShift) | (kNegOffset & kImm16Mask); // NOLINT LW | (fp.code() << kRsShift) | (kNegOffset & kImm16Mask);
const Instr kSwRegFpNegOffsetPattern = const Instr kSwRegFpNegOffsetPattern =
SW | (fp.code() << kRsShift) | (kNegOffset & kImm16Mask); // NOLINT SW | (fp.code() << kRsShift) | (kNegOffset & kImm16Mask);
// A mask for the Rt register for push, pop, lw, sw instructions. // A mask for the Rt register for push, pop, lw, sw instructions.
const Instr kRtMask = kRtFieldMask; const Instr kRtMask = kRtFieldMask;
const Instr kLwSwInstrTypeMask = 0xFFE00000; const Instr kLwSwInstrTypeMask = 0xFFE00000;
......
src/codegen/mips64/assembler-mips64.cc
View file @ fc377b05
...@@ -235,29 +235,27 @@ void Assembler::AllocateAndInstallRequestedHeapObjects(Isolate* isolate) { ...@@ -235,29 +235,27 @@ void Assembler::AllocateAndInstallRequestedHeapObjects(Isolate* isolate) {
// operations as post-increment of sp. // operations as post-increment of sp.
const Instr kPopInstruction = DADDIU | (sp.code() << kRsShift) | const Instr kPopInstruction = DADDIU | (sp.code() << kRsShift) |
(sp.code() << kRtShift) | (sp.code() << kRtShift) |
(kPointerSize & kImm16Mask); // NOLINT (kPointerSize & kImm16Mask);
// daddiu(sp, sp, -8) part of Push(r) operation as pre-decrement of sp. // daddiu(sp, sp, -8) part of Push(r) operation as pre-decrement of sp.
const Instr kPushInstruction = DADDIU | (sp.code() << kRsShift) | const Instr kPushInstruction = DADDIU | (sp.code() << kRsShift) |
(sp.code() << kRtShift) | (sp.code() << kRtShift) |
(-kPointerSize & kImm16Mask); // NOLINT (-kPointerSize & kImm16Mask);
// Sd(r, MemOperand(sp, 0)) // Sd(r, MemOperand(sp, 0))
const Instr kPushRegPattern = const Instr kPushRegPattern = SD | (sp.code() << kRsShift) | (0 & kImm16Mask);
SD | (sp.code() << kRsShift) | (0 & kImm16Mask); // NOLINT
// Ld(r, MemOperand(sp, 0)) // Ld(r, MemOperand(sp, 0))
const Instr kPopRegPattern = const Instr kPopRegPattern = LD | (sp.code() << kRsShift) | (0 & kImm16Mask);
LD | (sp.code() << kRsShift) | (0 & kImm16Mask); // NOLINT
const Instr kLwRegFpOffsetPattern = const Instr kLwRegFpOffsetPattern =
LW | (fp.code() << kRsShift) | (0 & kImm16Mask); // NOLINT LW | (fp.code() << kRsShift) | (0 & kImm16Mask);
const Instr kSwRegFpOffsetPattern = const Instr kSwRegFpOffsetPattern =
SW | (fp.code() << kRsShift) | (0 & kImm16Mask); // NOLINT SW | (fp.code() << kRsShift) | (0 & kImm16Mask);
const Instr kLwRegFpNegOffsetPattern = const Instr kLwRegFpNegOffsetPattern =
LW | (fp.code() << kRsShift) | (kNegOffset & kImm16Mask); // NOLINT LW | (fp.code() << kRsShift) | (kNegOffset & kImm16Mask);
const Instr kSwRegFpNegOffsetPattern = const Instr kSwRegFpNegOffsetPattern =
SW | (fp.code() << kRsShift) | (kNegOffset & kImm16Mask); // NOLINT SW | (fp.code() << kRsShift) | (kNegOffset & kImm16Mask);
// A mask for the Rt register for push, pop, lw, sw instructions. // A mask for the Rt register for push, pop, lw, sw instructions.
const Instr kRtMask = kRtFieldMask; const Instr kRtMask = kRtFieldMask;
const Instr kLwSwInstrTypeMask = 0xFFE00000; const Instr kLwSwInstrTypeMask = 0xFFE00000;
......
src/codegen/reloc-info.cc
View file @ fc377b05
...@@ -437,7 +437,7 @@ const char* RelocInfo::RelocModeName(RelocInfo::Mode rmode) { ...@@ -437,7 +437,7 @@ const char* RelocInfo::RelocModeName(RelocInfo::Mode rmode) {
return "unknown relocation type"; return "unknown relocation type";
} }
void RelocInfo::Print(Isolate* isolate, std::ostream& os) { // NOLINT void RelocInfo::Print(Isolate* isolate, std::ostream& os) {
os << reinterpret_cast<const void*>(pc_) << " " << RelocModeName(rmode_); os << reinterpret_cast<const void*>(pc_) << " " << RelocModeName(rmode_);
if (rmode_ == DEOPT_SCRIPT_OFFSET || rmode_ == DEOPT_INLINING_ID) { if (rmode_ == DEOPT_SCRIPT_OFFSET || rmode_ == DEOPT_INLINING_ID) {
os << " (" << data() << ")"; os << " (" << data() << ")";
......
src/codegen/reloc-info.h
View file @ fc377b05
...@@ -328,8 +328,8 @@ class RelocInfo { ...@@ -328,8 +328,8 @@ class RelocInfo {
#ifdef ENABLE_DISASSEMBLER #ifdef ENABLE_DISASSEMBLER
// Printing // Printing
static const char* RelocModeName(Mode rmode); static const char* RelocModeName(Mode rmode);
void Print(Isolate* isolate, std::ostream& os); // NOLINT void Print(Isolate* isolate, std::ostream& os);
#endif // ENABLE_DISASSEMBLER #endif // ENABLE_DISASSEMBLER
#ifdef VERIFY_HEAP #ifdef VERIFY_HEAP
void Verify(Isolate* isolate); void Verify(Isolate* isolate);
#endif #endif
......
src/codegen/safepoint-table.h
View file @ fc377b05
...@@ -135,7 +135,7 @@ class SafepointTable { ...@@ -135,7 +135,7 @@ class SafepointTable {
// Returns the entry for the given pc. // Returns the entry for the given pc.
SafepointEntry FindEntry(Address pc) const; SafepointEntry FindEntry(Address pc) const;
void PrintEntry(unsigned index, std::ostream& os) const; // NOLINT void PrintEntry(unsigned index, std::ostream& os) const;
private: private:
SafepointTable(Address instruction_start, Address safepoint_table_address, SafepointTable(Address instruction_start, Address safepoint_table_address,
......
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