PPC [liftoff]: Implement simd splat ops

Change-Id: Idb4f93cb40c6210ce1b8527d2ed0d0d942e15ca1
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3780523
Commit-Queue: Milad Farazmand <mfarazma@redhat.com>
Reviewed-by: Junliang Yan <junyan@redhat.com>
Cr-Commit-Position: refs/heads/main@{#81877}

src/codegen/ppc/macro-assembler-ppc.cc

@@ -3508,6 +3508,42 @@ void TurboAssembler::StoreSimd128LE(Simd128Register src, const MemOperand& mem,
 #endif
 }
 
+void TurboAssembler::F64x2Splat(Simd128Register dst, DoubleRegister src,
+                                Register scratch) {
+  constexpr int lane_width_in_bytes = 8;
+  MovDoubleToInt64(scratch, src);
+  mtvsrd(dst, scratch);
+  vinsertd(dst, dst, Operand(1 * lane_width_in_bytes));
+}
+
+void TurboAssembler::F32x4Splat(Simd128Register dst, DoubleRegister src,
+                                DoubleRegister scratch1, Register scratch2) {
+  MovFloatToInt(scratch2, src, scratch1);
+  mtvsrd(dst, scratch2);
+  vspltw(dst, dst, Operand(1));
+}
+
+void TurboAssembler::I64x2Splat(Simd128Register dst, Register src) {
+  constexpr int lane_width_in_bytes = 8;
+  mtvsrd(dst, src);
+  vinsertd(dst, dst, Operand(1 * lane_width_in_bytes));
+}
+
+void TurboAssembler::I32x4Splat(Simd128Register dst, Register src) {
+  mtvsrd(dst, src);
+  vspltw(dst, dst, Operand(1));
+}
+
+void TurboAssembler::I16x8Splat(Simd128Register dst, Register src) {
+  mtvsrd(dst, src);
+  vsplth(dst, dst, Operand(3));
+}
+
+void TurboAssembler::I8x16Splat(Simd128Register dst, Register src) {
+  mtvsrd(dst, src);
+  vspltb(dst, dst, Operand(7));
+}
+
 Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3,
                                    Register reg4, Register reg5,
                                    Register reg6) {

src/codegen/ppc/macro-assembler-ppc.h

@@ -1077,6 +1077,13 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
                      Register scratch);
   void StoreSimd128LE(Simd128Register src, const MemOperand& mem,
                       Register scratch1, Simd128Register scratch2);
+  void F64x2Splat(Simd128Register dst, DoubleRegister src, Register scratch);
+  void F32x4Splat(Simd128Register dst, DoubleRegister src,
+                  DoubleRegister scratch1, Register scratch2);
+  void I64x2Splat(Simd128Register dst, Register src);
+  void I32x4Splat(Simd128Register dst, Register src);
+  void I16x8Splat(Simd128Register dst, Register src);
+  void I8x16Splat(Simd128Register dst, Register src);
 
  private:
   static const int kSmiShift = kSmiTagSize + kSmiShiftSize;

src/compiler/backend/ppc/code-generator-ppc.cc

@@ -2196,44 +2196,29 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       break;
     }
     case kPPC_F64x2Splat: {
-      constexpr int lane_width_in_bytes = 8;
-      Simd128Register dst = i.OutputSimd128Register();
-      __ MovDoubleToInt64(kScratchReg, i.InputDoubleRegister(0));
-      __ mtvsrd(dst, kScratchReg);
-      __ vinsertd(dst, dst, Operand(1 * lane_width_in_bytes));
+      __ F64x2Splat(i.OutputSimd128Register(), i.InputDoubleRegister(0),
+                    kScratchReg);
       break;
     }
     case kPPC_F32x4Splat: {
-      Simd128Register dst = i.OutputSimd128Register();
-      __ MovFloatToInt(kScratchReg, i.InputDoubleRegister(0),
-                       kScratchDoubleReg);
-      __ mtvsrd(dst, kScratchReg);
-      __ vspltw(dst, dst, Operand(1));
+      __ F32x4Splat(i.OutputSimd128Register(), i.InputDoubleRegister(0),
+                    kScratchDoubleReg, kScratchReg);
       break;
     }
     case kPPC_I64x2Splat: {
-      constexpr int lane_width_in_bytes = 8;
-      Simd128Register dst = i.OutputSimd128Register();
-      __ mtvsrd(dst, i.InputRegister(0));
-      __ vinsertd(dst, dst, Operand(1 * lane_width_in_bytes));
+      __ I64x2Splat(i.OutputSimd128Register(), i.InputRegister(0));
       break;
     }
     case kPPC_I32x4Splat: {
-      Simd128Register dst = i.OutputSimd128Register();
-      __ mtvsrd(dst, i.InputRegister(0));
-      __ vspltw(dst, dst, Operand(1));
+      __ I32x4Splat(i.OutputSimd128Register(), i.InputRegister(0));
       break;
     }
     case kPPC_I16x8Splat: {
-      Simd128Register dst = i.OutputSimd128Register();
-      __ mtvsrd(dst, i.InputRegister(0));
-      __ vsplth(dst, dst, Operand(3));
+      __ I16x8Splat(i.OutputSimd128Register(), i.InputRegister(0));
       break;
     }
     case kPPC_I8x16Splat: {
-      Simd128Register dst = i.OutputSimd128Register();
-      __ mtvsrd(dst, i.InputRegister(0));
-      __ vspltb(dst, dst, Operand(7));
+      __ I8x16Splat(i.OutputSimd128Register(), i.InputRegister(0));
       break;
     }
     case kPPC_F64x2ExtractLane: {

src/wasm/baseline/ppc/liftoff-assembler-ppc.h

@@ -1740,6 +1740,36 @@ bool LiftoffAssembler::emit_select(LiftoffRegister dst, Register condition,
   return false;
 }
 
+void LiftoffAssembler::emit_f64x2_splat(LiftoffRegister dst,
+                                        LiftoffRegister src) {
+  F64x2Splat(dst.fp().toSimd(), src.fp(), r0);
+}
+
+void LiftoffAssembler::emit_f32x4_splat(LiftoffRegister dst,
+                                        LiftoffRegister src) {
+  F32x4Splat(dst.fp().toSimd(), src.fp(), kScratchDoubleReg, r0);
+}
+
+void LiftoffAssembler::emit_i64x2_splat(LiftoffRegister dst,
+                                        LiftoffRegister src) {
+  I64x2Splat(dst.fp().toSimd(), src.gp());
+}
+
+void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
+                                        LiftoffRegister src) {
+  I32x4Splat(dst.fp().toSimd(), src.gp());
+}
+
+void LiftoffAssembler::emit_i16x8_splat(LiftoffRegister dst,
+                                        LiftoffRegister src) {
+  I16x8Splat(dst.fp().toSimd(), src.gp());
+}
+
+void LiftoffAssembler::emit_i8x16_splat(LiftoffRegister dst,
+                                        LiftoffRegister src) {
+  I8x16Splat(dst.fp().toSimd(), src.gp());
+}
+
 void LiftoffAssembler::LoadTransform(LiftoffRegister dst, Register src_addr,
                                      Register offset_reg, uintptr_t offset_imm,
                                      LoadType type,
@@ -1809,11 +1839,6 @@ void LiftoffAssembler::emit_s128_relaxed_laneselect(LiftoffRegister dst,
   bailout(kRelaxedSimd, "emit_s128_relaxed_laneselect");
 }
 
-void LiftoffAssembler::emit_f64x2_splat(LiftoffRegister dst,
-                                        LiftoffRegister src) {
-  bailout(kUnsupportedArchitecture, "emit_f64x2splat");
-}
-
 void LiftoffAssembler::emit_f64x2_extract_lane(LiftoffRegister dst,
                                                LiftoffRegister lhs,
                                                uint8_t imm_lane_idx) {
@@ -1933,11 +1958,6 @@ void LiftoffAssembler::emit_f64x2_promote_low_f32x4(LiftoffRegister dst,
   bailout(kSimd, "f64x2.promote_low_f32x4");
 }
 
-void LiftoffAssembler::emit_f32x4_splat(LiftoffRegister dst,
-                                        LiftoffRegister src) {
-  bailout(kUnsupportedArchitecture, "emit_f32x4_splat");
-}
-
 void LiftoffAssembler::emit_f32x4_extract_lane(LiftoffRegister dst,
                                                LiftoffRegister lhs,
                                                uint8_t imm_lane_idx) {
@@ -2042,11 +2062,6 @@ void LiftoffAssembler::emit_f32x4_pmax(LiftoffRegister dst, LiftoffRegister lhs,
   bailout(kSimd, "pmax unimplemented");
 }
 
-void LiftoffAssembler::emit_i64x2_splat(LiftoffRegister dst,
-                                        LiftoffRegister src) {
-  bailout(kUnsupportedArchitecture, "emit_i64x2splat");
-}
-
 void LiftoffAssembler::emit_i64x2_extract_lane(LiftoffRegister dst,
                                                LiftoffRegister lhs,
                                                uint8_t imm_lane_idx) {
@@ -2166,11 +2181,6 @@ void LiftoffAssembler::emit_i64x2_extmul_high_i32x4_u(LiftoffRegister dst,
   bailout(kSimd, "i64x2_extmul_high_i32x4_u unsupported");
 }
 
-void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
-                                        LiftoffRegister src) {
-  bailout(kUnsupportedArchitecture, "emit_i32x4_splat");
-}
-
 void LiftoffAssembler::emit_i32x4_extract_lane(LiftoffRegister dst,
                                                LiftoffRegister lhs,
                                                uint8_t imm_lane_idx) {
@@ -2310,11 +2320,6 @@ void LiftoffAssembler::emit_i32x4_extmul_high_i16x8_u(LiftoffRegister dst,
   bailout(kSimd, "i32x4_extmul_high_i16x8_u unsupported");
 }
 
-void LiftoffAssembler::emit_i16x8_splat(LiftoffRegister dst,
-                                        LiftoffRegister src) {
-  bailout(kUnsupportedArchitecture, "emit_i16x8splat");
-}
-
 void LiftoffAssembler::emit_i16x8_neg(LiftoffRegister dst,
                                       LiftoffRegister src) {
   bailout(kUnsupportedArchitecture, "emit_i16x8neg");
@@ -2516,11 +2521,6 @@ void LiftoffAssembler::emit_i8x16_popcnt(LiftoffRegister dst,
   bailout(kSimd, "i8x16.popcnt");
 }
 
-void LiftoffAssembler::emit_i8x16_splat(LiftoffRegister dst,
-                                        LiftoffRegister src) {
-  bailout(kUnsupportedArchitecture, "emit_i8x16splat");
-}
-
 void LiftoffAssembler::emit_i8x16_extract_lane_u(LiftoffRegister dst,
                                                  LiftoffRegister lhs,
                                                  uint8_t imm_lane_idx) {