[ia32][root] Remove ebx from the Liftoff cache registers

Drive-by: Fix a bug in {ProcessParameter} which was uncovered by this CL.

R=titzer@chromium.org
CC=​​sigurds@chromium.org, jgruber@chromium.org

Bug: v8:6666
Change-Id: Ia775e8b4b9fdb9cecc226bdd870319a73950c18f
Reviewed-on: https://chromium-review.googlesource.com/c/1270589
Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
Reviewed-by: Ben Titzer <titzer@chromium.org>
Cr-Commit-Position: refs/heads/master@{#56477}

src/wasm/baseline/ia32/liftoff-assembler-ia32.h

@@ -43,10 +43,7 @@ inline Operand GetHalfStackSlot(uint32_t half_index) {
 inline Operand GetInstanceOperand() { return Operand(ebp, -8); }
 
 static constexpr LiftoffRegList kByteRegs =
-    LiftoffRegList::FromBits<Register::ListOf<eax, ecx, edx, ebx>()>();
-static_assert(kByteRegs.GetNumRegsSet() == 4, "should have four byte regs");
-static_assert((kByteRegs & kGpCacheRegList) == kByteRegs,
-              "kByteRegs only contains gp cache registers");
+    LiftoffRegList::FromBits<Register::ListOf<eax, ecx, edx>()>();
 
 inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, Register base,
                  int32_t offset, ValueType type) {
@@ -768,7 +765,7 @@ void LiftoffAssembler::emit_i64_mul(LiftoffRegister dst, LiftoffRegister lhs,
   Register lhs_hi = ecx;
   Register lhs_lo = dst_lo;
   Register rhs_hi = dst_hi;
-  Register rhs_lo = ebx;
+  Register rhs_lo = esi;
 
   // Spill all these registers if they are still holding other values.
   liftoff::SpillRegisters(this, dst_hi, dst_lo, lhs_hi, rhs_lo);
@@ -784,7 +781,7 @@ void LiftoffAssembler::emit_i64_mul(LiftoffRegister dst, LiftoffRegister lhs,
   imul(rhs_hi, lhs_lo);
   // Add them: lhs_hi'' = lhs_hi' + rhs_hi' = lhs_hi * rhs_lo + rhs_hi * lhs_lo.
   add(lhs_hi, rhs_hi);
-  // Third mul: edx:eax (dst_hi:dst_lo) = eax * ebx (lhs_lo * rhs_lo).
+  // Third mul: edx:eax (dst_hi:dst_lo) = eax * esi (lhs_lo * rhs_lo).
   mul(rhs_lo);
   // Add lhs_hi'' to dst_hi.
   add(dst_hi, lhs_hi);

src/wasm/baseline/liftoff-assembler-defs.h

@@ -15,7 +15,7 @@ namespace wasm {
 #if V8_TARGET_ARCH_IA32
 
 constexpr RegList kLiftoffAssemblerGpCacheRegs =
-    Register::ListOf<eax, ecx, edx, ebx, esi, edi>();
+    Register::ListOf<eax, ecx, edx, esi, edi>();
 
 // Omit xmm7, which is the kScratchDoubleReg.
 constexpr RegList kLiftoffAssemblerFpCacheRegs =

src/wasm/baseline/liftoff-compiler.cc

@@ -263,9 +263,10 @@ class LiftoffCompiler {
   // Returns the number of inputs processed (1 or 2).
   uint32_t ProcessParameter(ValueType type, uint32_t input_idx) {
     const int num_lowered_params = 1 + needs_reg_pair(type);
+    ValueType lowered_type = needs_reg_pair(type) ? kWasmI32 : type;
+    RegClass rc = reg_class_for(lowered_type);
     // Initialize to anything, will be set in the loop and used afterwards.
     LiftoffRegister reg = kGpCacheRegList.GetFirstRegSet();
-    RegClass rc = num_lowered_params == 1 ? reg_class_for(type) : kGpReg;
     LiftoffRegList pinned;
     for (int pair_idx = 0; pair_idx < num_lowered_params; ++pair_idx) {
       compiler::LinkageLocation param_loc =
@@ -286,14 +287,14 @@ class LiftoffCompiler {
           // {LiftoffRegister} can only store cache regs.
           in_reg = __ GetUnusedRegister(rc, pinned);
           if (rc == kGpReg) {
-            __ Move(in_reg.gp(), Register::from_code(reg_code), type);
+            __ Move(in_reg.gp(), Register::from_code(reg_code), lowered_type);
           } else {
-            __ Move(in_reg.fp(), DoubleRegister::from_code(reg_code), type);
+            __ Move(in_reg.fp(), DoubleRegister::from_code(reg_code),
+                    lowered_type);
           }
         }
       } else if (param_loc.IsCallerFrameSlot()) {
         in_reg = __ GetUnusedRegister(rc, pinned);
-        ValueType lowered_type = num_lowered_params == 1 ? type : kWasmI32;
         __ LoadCallerFrameSlot(in_reg, -param_loc.AsCallerFrameSlot(),
                                lowered_type);
       }