Commit f6406374 authored by Milad Fa's avatar Milad Fa Committed by Commit Bot

S390 [wasm-simd]: Implement i64x2.abs

Bug: v8:11416
Change-Id: I0c993ee564358f5c5f8880cbae1bce9ff2128087
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2698308
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Cr-Commit-Position: refs/heads/master@{#72798}
parent ddd2200f
...@@ -2524,6 +2524,7 @@ void InstructionSelector::VisitI32x4TruncSatF64x2UZero(Node* node) { ...@@ -2524,6 +2524,7 @@ void InstructionSelector::VisitI32x4TruncSatF64x2UZero(Node* node) {
} }
void InstructionSelector::VisitI64x2GtS(Node* node) { UNIMPLEMENTED(); } void InstructionSelector::VisitI64x2GtS(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitI64x2GeS(Node* node) { UNIMPLEMENTED(); } void InstructionSelector::VisitI64x2GeS(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitI64x2Abs(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::EmitPrepareResults( void InstructionSelector::EmitPrepareResults(
ZoneVector<PushParameter>* results, const CallDescriptor* call_descriptor, ZoneVector<PushParameter>* results, const CallDescriptor* call_descriptor,
......
...@@ -3434,6 +3434,11 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -3434,6 +3434,11 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
Condition(0), Condition(2)); Condition(0), Condition(2));
break; break;
} }
case kS390_I64x2Abs: {
__ vlp(i.OutputSimd128Register(), i.InputSimd128Register(0), Condition(0),
Condition(0), Condition(3));
break;
}
// vector boolean unops // vector boolean unops
case kS390_V128AnyTrue: { case kS390_V128AnyTrue: {
Simd128Register src = i.InputSimd128Register(0); Simd128Register src = i.InputSimd128Register(0);
......
...@@ -271,6 +271,7 @@ namespace compiler { ...@@ -271,6 +271,7 @@ namespace compiler {
V(S390_I64x2Ne) \ V(S390_I64x2Ne) \
V(S390_I64x2GtS) \ V(S390_I64x2GtS) \
V(S390_I64x2GeS) \ V(S390_I64x2GeS) \
V(S390_I64x2Abs) \
V(S390_I32x4Splat) \ V(S390_I32x4Splat) \
V(S390_I32x4ExtractLane) \ V(S390_I32x4ExtractLane) \
V(S390_I32x4ReplaceLane) \ V(S390_I32x4ReplaceLane) \
......
...@@ -218,6 +218,7 @@ int InstructionScheduler::GetTargetInstructionFlags( ...@@ -218,6 +218,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_I64x2Ne: case kS390_I64x2Ne:
case kS390_I64x2GtS: case kS390_I64x2GtS:
case kS390_I64x2GeS: case kS390_I64x2GeS:
case kS390_I64x2Abs:
case kS390_I32x4Splat: case kS390_I32x4Splat:
case kS390_I32x4ExtractLane: case kS390_I32x4ExtractLane:
case kS390_I32x4ReplaceLane: case kS390_I32x4ReplaceLane:
......
...@@ -2526,6 +2526,7 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) { ...@@ -2526,6 +2526,7 @@ void InstructionSelector::VisitWord64AtomicStore(Node* node) {
V(I64x2SConvertI32x4High) \ V(I64x2SConvertI32x4High) \
V(I64x2UConvertI32x4Low) \ V(I64x2UConvertI32x4Low) \
V(I64x2UConvertI32x4High) \ V(I64x2UConvertI32x4High) \
V(I64x2Abs) \
V(I32x4Neg) \ V(I32x4Neg) \
V(I32x4Abs) \ V(I32x4Abs) \
V(I32x4SConvertI16x8Low) \ V(I32x4SConvertI16x8Low) \
......
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