Commit f5e73635 authored by Santiago Aboy Solanes's avatar Santiago Aboy Solanes Committed by Commit Bot

Reland "[ptr-compr] Storing a Tagged value stores the lower 32 bits"

This is a reland of 9b1e174f\

Reverted for a test failure that was unrelated to this CL. It was fixed in
https://chromium-review.googlesource.com/c/v8/v8/+/1845223.

Original change's description:
> [ptr-compr] Storing a Tagged value stores the lower 32 bits
>
> This CL changes the Tagged stores when pointer compression is enabled.
> It shouldn't affect anything for the time being since if we have pointer
> compression enabled, we are going to be storing Compressed values. Later,
> we will eliminate the Compressed representation and that it's where it
> will come into effect.
>
> The Arm64 side of the CL looks bigger since we eliminated the opcode in
> https://chromium-review.googlesource.com/c/v8/v8/+/1803345.
>
> Bug: v8:7703
> Change-Id: Ic4afbff9646b5d058adb9619b20ccccb3f5aed45
> Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1822044
> Reviewed-by: Jakob Gruber <jgruber@chromium.org>
> Commit-Queue: Santiago Aboy Solanes <solanes@chromium.org>
> Cr-Commit-Position: refs/heads/master@{#64133}

Bug: v8:7703
Change-Id: I7775e90c36f180adb0484b22eaf3918d9c012b77
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1845219Reviewed-by: 's avatarIgor Sheludko <ishell@chromium.org>
Reviewed-by: 's avatarJakob Gruber <jgruber@chromium.org>
Commit-Queue: Santiago Aboy Solanes <solanes@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64156}
parent 874609cb
......@@ -1616,6 +1616,9 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kArm64Str:
__ Str(i.InputOrZeroRegister64(0), i.MemoryOperand(1));
break;
case kArm64StrCompressTagged:
__ StoreTaggedField(i.InputOrZeroRegister64(0), i.MemoryOperand(1));
break;
case kArm64DecompressSigned: {
__ DecompressTaggedSigned(i.OutputRegister(), i.InputRegister(0));
break;
......
......@@ -164,6 +164,7 @@ namespace compiler {
V(Arm64LdrDecompressTaggedPointer) \
V(Arm64LdrDecompressAnyTagged) \
V(Arm64Str) \
V(Arm64StrCompressTagged) \
V(Arm64DecompressSigned) \
V(Arm64DecompressPointer) \
V(Arm64DecompressAny) \
......
......@@ -355,6 +355,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kArm64Strh:
case kArm64StrW:
case kArm64Str:
case kArm64StrCompressTagged:
case kArm64DmbIsh:
case kArm64DsbIsb:
return kHasSideEffect;
......
......@@ -724,7 +724,7 @@ void InstructionSelector::VisitStore(Node* node) {
case MachineRepresentation::kCompressedPointer: // Fall through.
case MachineRepresentation::kCompressed:
#ifdef V8_COMPRESS_POINTERS
opcode = kArm64StrW;
opcode = kArm64StrCompressTagged;
immediate_mode = kLoadStoreImm32;
break;
#else
......@@ -732,7 +732,11 @@ void InstructionSelector::VisitStore(Node* node) {
#endif
case MachineRepresentation::kTaggedSigned: // Fall through.
case MachineRepresentation::kTaggedPointer: // Fall through.
case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kTagged:
opcode = kArm64StrCompressTagged;
immediate_mode =
COMPRESS_POINTERS_BOOL ? kLoadStoreImm32 : kLoadStoreImm64;
break;
case MachineRepresentation::kWord64:
opcode = kArm64Str;
immediate_mode = kLoadStoreImm64;
......
......@@ -288,7 +288,8 @@ ArchOpcode GetStoreOpcode(StoreRepresentation store_rep) {
#endif
case MachineRepresentation::kTaggedSigned: // Fall through.
case MachineRepresentation::kTaggedPointer: // Fall through.
case MachineRepresentation::kTagged: // Fall through.
case MachineRepresentation::kTagged:
return kX64MovqCompressTagged;
case MachineRepresentation::kWord64:
return kX64Movq;
case MachineRepresentation::kSimd128: // Fall through.
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment