Commit f5ba33ad authored by Victor Gomes's avatar Victor Gomes Committed by V8 LUCI CQ

[maglev] Create Int32Constant Node

... and fix AddSmi operation.

Bug: v8:7700
Change-Id: If81030e1e0d457076e09db62553342f04477e255
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3581983
Auto-Submit: Victor Gomes <victorgomes@chromium.org>
Reviewed-by: 's avatarLeszek Swirski <leszeks@chromium.org>
Commit-Queue: Leszek Swirski <leszeks@chromium.org>
Cr-Commit-Position: refs/heads/main@{#79921}
parent b3307596
......@@ -207,15 +207,17 @@ void MaglevGraphBuilder::VisitBinarySmiOperation() {
if (hint == BinaryOperationHint::kSignedSmall) {
ValueNode* left = AddNewNode<CheckedSmiUntag>({GetAccumulator()});
Smi constant = Smi::FromInt(iterator_.GetImmediateOperand(0));
int32_t constant = iterator_.GetImmediateOperand(0);
if (kOperation == Operation::kAdd) {
if (constant == Smi::zero()) {
if (constant == 0) {
// For addition of zero, when the accumulator passed the Smi check,
// it already has the right value, so we can just return.
return;
}
ValueNode* right = AddNewNode<SmiConstant>({}, constant);
// TODO(victorgomes): We could create an Int32Add node that receives
// a constant and avoid a register move.
ValueNode* right = AddNewNode<Int32Constant>({}, constant);
ValueNode* result = AddNewNode<Int32AddWithOverflow>({left, right});
SetAccumulator(AddNewNode<CheckedSmiTag>({result}));
return;
......
......@@ -735,6 +735,19 @@ void CheckedSmiTag::GenerateCode(MaglevCodeGenState* code_gen_state,
EmitEagerDeoptIf(overflow, code_gen_state, this);
}
void Int32Constant::AllocateVreg(MaglevVregAllocationState* vreg_state,
const ProcessingState& state) {
DefineAsRegister(vreg_state, this);
}
void Int32Constant::GenerateCode(MaglevCodeGenState* code_gen_state,
const ProcessingState& state) {
__ Move(ToRegister(result()), Immediate(value()));
}
void Int32Constant::PrintParams(std::ostream& os,
MaglevGraphLabeller* graph_labeller) const {
os << "(" << value() << ")";
}
void Int32AddWithOverflow::AllocateVreg(MaglevVregAllocationState* vreg_state,
const ProcessingState& state) {
UseRegister(left_input());
......
......@@ -79,6 +79,7 @@ class CompactInterpreterFrameState;
V(CheckedSmiTag) \
V(CheckedSmiUntag) \
V(Int32AddWithOverflow) \
V(Int32Constant) \
GENERIC_OPERATIONS_NODE_LIST(V)
#define NODE_LIST(V) \
......@@ -951,6 +952,23 @@ class CheckedSmiUntag : public FixedInputValueNodeT<1, CheckedSmiUntag> {
void PrintParams(std::ostream&, MaglevGraphLabeller*) const {}
};
class Int32Constant : public FixedInputValueNodeT<0, Int32Constant> {
using Base = FixedInputValueNodeT<0, Int32Constant>;
public:
explicit Int32Constant(uint32_t bitfield, int32_t value)
: Base(bitfield), value_(value) {}
int32_t value() const { return value_; }
void AllocateVreg(MaglevVregAllocationState*, const ProcessingState&);
void GenerateCode(MaglevCodeGenState*, const ProcessingState&);
void PrintParams(std::ostream&, MaglevGraphLabeller*) const;
private:
const int32_t value_;
};
class Int32AddWithOverflow
: public FixedInputValueNodeT<2, Int32AddWithOverflow> {
using Base = FixedInputValueNodeT<2, Int32AddWithOverflow>;
......
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