Commit f1e56637 authored by Ng Zhi An's avatar Ng Zhi An Committed by Commit Bot

[wasm-simd][arm64][liftoff] Implement double precision conversions

Did not factor out the codegen because it is short enough (1 or 2
instructions) and will unlikely be changed (for optimization reasons).

Bug: v8:11265
Change-Id: Ic5e5bc7642e80448bdaa6d130dfe7c12018eb481
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2683209
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#72664}
parent 9d9c7d02
......@@ -1828,17 +1828,19 @@ void LiftoffAssembler::emit_f64x2_pmax(LiftoffRegister dst, LiftoffRegister lhs,
void LiftoffAssembler::emit_f64x2_convert_low_i32x4_s(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "f64x2.convert_low_i32x4_s");
Sxtl(dst.fp(), src.fp().V2S());
Scvtf(dst.fp(), dst.fp());
}
void LiftoffAssembler::emit_f64x2_convert_low_i32x4_u(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "f64x2.convert_low_i32x4_u");
Uxtl(dst.fp(), src.fp().V2S());
Ucvtf(dst.fp(), dst.fp());
}
void LiftoffAssembler::emit_f64x2_promote_low_f32x4(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "f64x2.promote_low_f32x4");
Fcvtl(dst.fp().V2D(), src.fp().V2S());
}
void LiftoffAssembler::emit_f32x4_splat(LiftoffRegister dst,
......@@ -2832,7 +2834,7 @@ void LiftoffAssembler::emit_f32x4_uconvert_i32x4(LiftoffRegister dst,
void LiftoffAssembler::emit_f32x4_demote_f64x2_zero(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "f32x4.demote_f64x2_zero");
Fcvtn(dst.fp().V2S(), src.fp().V2D());
}
void LiftoffAssembler::emit_i8x16_sconvert_i16x8(LiftoffRegister dst,
......@@ -2933,12 +2935,14 @@ void LiftoffAssembler::emit_i32x4_uconvert_i16x8_high(LiftoffRegister dst,
void LiftoffAssembler::emit_i32x4_trunc_sat_f64x2_s_zero(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "i32x4.trunc_sat_f64x2_s_zero");
Fcvtzs(dst.fp().V2D(), src.fp().V2D());
Sqxtn(dst.fp().V2S(), dst.fp().V2D());
}
void LiftoffAssembler::emit_i32x4_trunc_sat_f64x2_u_zero(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "i32x4.trunc_sat_f64x2_u_zero");
Fcvtzs(dst.fp().V2D(), src.fp().V2D());
Uqxtn(dst.fp().V2S(), dst.fp().V2D());
}
void LiftoffAssembler::emit_s128_and_not(LiftoffRegister dst,
......
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