Commit f0c353f6 authored by Milad Fa's avatar Milad Fa Committed by V8 LUCI CQ

PPC: Check R bit is not set with prefixed instructions

CL also adds TODO items to implement this functionality on
disassembler and the simulator.

The R bit which enables PC-relative capabilities when set is
not being used during codegen at the moment.

Change-Id: I0927d9be37a50beecf9b6a052e378dca7604513b
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3584535Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Commit-Queue: Milad Farazmand <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/main@{#79976}
parent ac2275b8
...@@ -466,6 +466,8 @@ void Decoder::DecodeExtP(Instruction* instr) { ...@@ -466,6 +466,8 @@ void Decoder::DecodeExtP(Instruction* instr) {
switch (EXTP | (instr->BitField(25, 25))) { switch (EXTP | (instr->BitField(25, 25))) {
case PLOAD_STORE_8LS: case PLOAD_STORE_8LS:
case PLOAD_STORE_MLS: { case PLOAD_STORE_MLS: {
// TODO(miladfarca): Decode the R bit.
DCHECK_NE(instr->Bit(20), 1);
// Read prefix. // Read prefix.
SetAsPrefixed(instr->Bits(17, 0)); SetAsPrefixed(instr->Bits(17, 0));
// Read suffix (next instruction). // Read suffix (next instruction).
......
...@@ -1544,6 +1544,9 @@ void Simulator::ExecuteGeneric(Instruction* instr) { ...@@ -1544,6 +1544,9 @@ void Simulator::ExecuteGeneric(Instruction* instr) {
// Prefixed instructions. // Prefixed instructions.
case PLOAD_STORE_8LS: case PLOAD_STORE_8LS:
case PLOAD_STORE_MLS: { case PLOAD_STORE_MLS: {
// TODO(miladfarca): Simulate PC-relative capability indicated by the R
// bit.
DCHECK_NE(instr->Bit(20), 1);
// Read prefix value. // Read prefix value.
uint64_t prefix_value = instr->Bits(17, 0); uint64_t prefix_value = instr->Bits(17, 0);
// Read suffix (next instruction). // Read suffix (next instruction).
......
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