[riscv64][assembler] Renaming a bit field for C-ext shift

Change-Id: I9ef64cb1b91bb0af7c0199a5ae573613a579fc8a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3084361
Commit-Queue: Brice Dobry <brice.dobry@futurewei.com>
Reviewed-by: Brice Dobry <brice.dobry@futurewei.com>
Cr-Commit-Position: refs/heads/master@{#76201}

src/codegen/riscv64/assembler-riscv64.cc

@@ -2113,9 +2113,9 @@ void Assembler::c_lui(Register rd, int8_t imm6) {
   GenInstrCI(0b011, C1, rd, imm6);
 }
 
-void Assembler::c_slli(Register rd, uint8_t uimm6) {
-  DCHECK(rd != zero_reg && uimm6 != 0);
-  GenInstrCIU(0b000, C2, rd, uimm6);
+void Assembler::c_slli(Register rd, uint8_t shamt6) {
+  DCHECK(rd != zero_reg && shamt6 != 0);
+  GenInstrCIU(0b000, C2, rd, shamt6);
 }
 
 void Assembler::c_fldsp(FPURegister rd, uint16_t uimm9) {
@@ -2297,14 +2297,14 @@ void Assembler::c_beqz(Register rs1, int16_t imm9) {
   GenInstrCB(0b110, C1, rs1, uimm8);
 }
 
-void Assembler::c_srli(Register rs1, int8_t imm6) {
-  DCHECK(((rs1.code() & 0b11000) == 0b01000) && is_int6(imm6));
-  GenInstrCBA(0b100, 0b00, C1, rs1, imm6);
+void Assembler::c_srli(Register rs1, int8_t shamt6) {
+  DCHECK(((rs1.code() & 0b11000) == 0b01000) && is_int6(shamt6));
+  GenInstrCBA(0b100, 0b00, C1, rs1, shamt6);
 }
 
-void Assembler::c_srai(Register rs1, int8_t imm6) {
-  DCHECK(((rs1.code() & 0b11000) == 0b01000) && is_int6(imm6));
-  GenInstrCBA(0b100, 0b01, C1, rs1, imm6);
+void Assembler::c_srai(Register rs1, int8_t shamt6) {
+  DCHECK(((rs1.code() & 0b11000) == 0b01000) && is_int6(shamt6));
+  GenInstrCBA(0b100, 0b01, C1, rs1, shamt6);
 }
 
 void Assembler::c_andi(Register rs1, int8_t imm6) {

src/codegen/riscv64/assembler-riscv64.h

@@ -630,7 +630,7 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
   void c_addi4spn(Register rd, int16_t uimm10);
   void c_li(Register rd, int8_t imm6);
   void c_lui(Register rd, int8_t imm6);
-  void c_slli(Register rd, uint8_t uimm6);
+  void c_slli(Register rd, uint8_t shamt6);
   void c_fldsp(FPURegister rd, uint16_t uimm9);
   void c_lwsp(Register rd, uint16_t uimm8);
   void c_ldsp(Register rd, uint16_t uimm9);
@@ -660,8 +660,8 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
   inline void c_bnez(Register rs1, Label* L) { c_bnez(rs1, branch_offset(L)); }
   void c_beqz(Register rs1, int16_t imm9);
   inline void c_beqz(Register rs1, Label* L) { c_beqz(rs1, branch_offset(L)); }
-  void c_srli(Register rs1, int8_t imm6);
-  void c_srai(Register rs1, int8_t imm6);
+  void c_srli(Register rs1, int8_t shamt6);
+  void c_srai(Register rs1, int8_t shamt6);
   void c_andi(Register rs1, int8_t imm6);
   void NOP();
   void EBREAK();