MIPS64: Fix r6 boolean materializations after a float32 compare.

The upper 32-bits of the FP compare register are undefined in
the float32 case. The compare instruction returns all 1's or
all 0's, so just use the LS bit.

Remove unnecessary use of 'at' reg. Change mips32 for consistency,
but it did not have the bug.

TEST=mjsunit/asm/embenchen/box2d (r6)
BUG=

Review URL: https://codereview.chromium.org/1425603002

Cr-Commit-Position: refs/heads/master@{#31582}

src/compiler/mips/code-generator-mips.cc

@@ -1101,8 +1101,8 @@ void CodeGenerator::AssembleArchBoolean(Instruction* instr,
         DCHECK(instr->arch_opcode() == kMipsCmpS);
         __ cmp(cc, W, kDoubleCompareReg, left, right);
       }
-      __ mfc1(at, kDoubleCompareReg);
-      __ srl(result, at, 31);  // Cmp returns all 1s for true.
+      __ mfc1(result, kDoubleCompareReg);
+      __ andi(result, result, 1);  // Cmp returns all 1's/0's, use only LSB.
       if (!predicate)          // Toggle result for not equal.
         __ xori(result, result, 1);
     }

src/compiler/mips64/code-generator-mips64.cc

@@ -1180,8 +1180,9 @@ void CodeGenerator::AssembleArchBoolean(Instruction* instr,
         DCHECK(instr->arch_opcode() == kMips64CmpS);
         __ cmp(cc, W, kDoubleCompareReg, left, right);
       }
-      __ dmfc1(at, kDoubleCompareReg);
-      __ dsrl32(result, at, 31);  // Cmp returns all 1s for true.
+      __ dmfc1(result, kDoubleCompareReg);
+      __ andi(result, result, 1);  // Cmp returns all 1's/0's, use only LSB.
+
       if (!predicate)  // Toggle result for not equal.
         __ xori(result, result, 1);
     }