Commit ed679e52 authored by zhengxing.li's avatar zhengxing.li Committed by Commit bot

X87: [turbofan] Implemented the optional Float32RoundDown operator.

  port 74434403 (r32261)

  original commit message:
  I implemented the optional Float32RoundDown operator on x64, ia32, arm,
  and arm64.

  For arm I also had to adjust the simulator.

BUG=

Review URL: https://codereview.chromium.org/1490113003

Cr-Commit-Position: refs/heads/master@{#32492}
parent f618401a
...@@ -834,6 +834,23 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) { ...@@ -834,6 +834,23 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
__ lea(esp, Operand(esp, kFloatSize)); __ lea(esp, Operand(esp, kFloatSize));
break; break;
} }
case kX87Float32Round: {
RoundingMode mode =
static_cast<RoundingMode>(MiscField::decode(instr->opcode()));
// Set the correct round mode in x87 control register
__ X87SetRC((mode << 10));
if (!instr->InputAt(0)->IsDoubleRegister()) {
InstructionOperand* input = instr->InputAt(0);
USE(input);
DCHECK(input->IsDoubleStackSlot());
__ fstp(0);
__ fld_s(i.InputOperand(0));
}
__ frndint();
__ X87SetRC(0x0000);
break;
}
case kX87Float64Add: { case kX87Float64Add: {
__ X87SetFPUCW(0x027F); __ X87SetFPUCW(0x027F);
__ fstp(0); __ fstp(0);
......
...@@ -43,6 +43,7 @@ namespace compiler { ...@@ -43,6 +43,7 @@ namespace compiler {
V(X87Float32Min) \ V(X87Float32Min) \
V(X87Float32Abs) \ V(X87Float32Abs) \
V(X87Float32Sqrt) \ V(X87Float32Sqrt) \
V(X87Float32Round) \
V(X87LoadFloat64Constant) \ V(X87LoadFloat64Constant) \
V(X87Float64Add) \ V(X87Float64Add) \
V(X87Float64Sub) \ V(X87Float64Sub) \
......
...@@ -842,7 +842,11 @@ void InstructionSelector::VisitFloat64Sqrt(Node* node) { ...@@ -842,7 +842,11 @@ void InstructionSelector::VisitFloat64Sqrt(Node* node) {
} }
void InstructionSelector::VisitFloat32RoundDown(Node* node) { UNIMPLEMENTED(); } void InstructionSelector::VisitFloat32RoundDown(Node* node) {
X87OperandGenerator g(this);
Emit(kX87Float32Round | MiscField::encode(kRoundDown),
g.UseFixed(node, stX_0), g.Use(node->InputAt(0)));
}
void InstructionSelector::VisitFloat64RoundDown(Node* node) { void InstructionSelector::VisitFloat64RoundDown(Node* node) {
...@@ -1310,7 +1314,8 @@ InstructionSelector::SupportedMachineOperatorFlags() { ...@@ -1310,7 +1314,8 @@ InstructionSelector::SupportedMachineOperatorFlags() {
flags |= MachineOperatorBuilder::kFloat64RoundDown | flags |= MachineOperatorBuilder::kFloat64RoundDown |
MachineOperatorBuilder::kFloat64RoundUp | MachineOperatorBuilder::kFloat64RoundUp |
MachineOperatorBuilder::kFloat64RoundTruncate | MachineOperatorBuilder::kFloat64RoundTruncate |
MachineOperatorBuilder::kFloat64RoundTiesEven; MachineOperatorBuilder::kFloat64RoundTiesEven |
MachineOperatorBuilder::kFloat32RoundDown;
return flags; return flags;
} }
......
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