Commit ec5c7809 authored by JianxiaoLuIntel's avatar JianxiaoLuIntel Committed by V8 LUCI CQ

[x64] Use "test r, r" instead of "cmp r, 0" for "x==0" and "x!=0"

Can reduce 1 byte instruction size.

Change-Id: Ie97841c5011d91e295e756aef4b45b62c3ec52f4
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3885956Reviewed-by: 's avatarNico Hartmann <nicohartmann@chromium.org>
Commit-Queue: Jianxiao Lu <jianxiao.lu@intel.com>
Cr-Commit-Position: refs/heads/main@{#83286}
parent 14777f6b
...@@ -789,7 +789,41 @@ void EmitTSANRelaxedLoadOOLIfNeeded(Zone* zone, CodeGenerator* codegen, ...@@ -789,7 +789,41 @@ void EmitTSANRelaxedLoadOOLIfNeeded(Zone* zone, CodeGenerator* codegen,
} \ } \
} while (false) } while (false)
#define ASSEMBLE_COMPARE(asm_instr) \ #define ASSEMBLE_COMPARE(cmp_instr, test_instr) \
do { \
if (HasAddressingMode(instr)) { \
size_t index = 0; \
Operand left = i.MemoryOperand(&index); \
if (HasImmediateInput(instr, index)) { \
__ cmp_instr(left, i.InputImmediate(index)); \
} else { \
__ cmp_instr(left, i.InputRegister(index)); \
} \
} else { \
if (HasImmediateInput(instr, 1)) { \
Immediate right = i.InputImmediate(1); \
if (HasRegisterInput(instr, 0)) { \
if (right.value() == 0 && \
(FlagsConditionField::decode(opcode) == kEqual || \
FlagsConditionField::decode(opcode) == kNotEqual)) { \
__ test_instr(i.InputRegister(0), i.InputRegister(0)); \
} else { \
__ cmp_instr(i.InputRegister(0), right); \
} \
} else { \
__ cmp_instr(i.InputOperand(0), right); \
} \
} else { \
if (HasRegisterInput(instr, 1)) { \
__ cmp_instr(i.InputRegister(0), i.InputRegister(1)); \
} else { \
__ cmp_instr(i.InputRegister(0), i.InputOperand(1)); \
} \
} \
} \
} while (false)
#define ASSEMBLE_TEST(asm_instr) \
do { \ do { \
if (HasAddressingMode(instr)) { \ if (HasAddressingMode(instr)) { \
size_t index = 0; \ size_t index = 0; \
...@@ -1639,28 +1673,28 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -1639,28 +1673,28 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
ASSEMBLE_BINOP(andq); ASSEMBLE_BINOP(andq);
break; break;
case kX64Cmp8: case kX64Cmp8:
ASSEMBLE_COMPARE(cmpb); ASSEMBLE_COMPARE(cmpb, testb);
break; break;
case kX64Cmp16: case kX64Cmp16:
ASSEMBLE_COMPARE(cmpw); ASSEMBLE_COMPARE(cmpw, testw);
break; break;
case kX64Cmp32: case kX64Cmp32:
ASSEMBLE_COMPARE(cmpl); ASSEMBLE_COMPARE(cmpl, testl);
break; break;
case kX64Cmp: case kX64Cmp:
ASSEMBLE_COMPARE(cmpq); ASSEMBLE_COMPARE(cmpq, testq);
break; break;
case kX64Test8: case kX64Test8:
ASSEMBLE_COMPARE(testb); ASSEMBLE_TEST(testb);
break; break;
case kX64Test16: case kX64Test16:
ASSEMBLE_COMPARE(testw); ASSEMBLE_TEST(testw);
break; break;
case kX64Test32: case kX64Test32:
ASSEMBLE_COMPARE(testl); ASSEMBLE_TEST(testl);
break; break;
case kX64Test: case kX64Test:
ASSEMBLE_COMPARE(testq); ASSEMBLE_TEST(testq);
break; break;
case kX64Imul32: case kX64Imul32:
ASSEMBLE_MULT(imull); ASSEMBLE_MULT(imull);
......
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